Power supply device for vehicles

ABSTRACT

An electrical power supply system for a vehicle is provided, which can eliminate proliferation of adverse effect on other control modules caused within one of a plurality of control modules. This is accomplished by provision of the power supply system comprising: battery  10  for supplying power; power line PL in a loop lay-out; a plurality of control modules BCM  100 , VCM  110 , FIM  120 , DDM  130 , RIM  140 , CCM  150  and PDM  160  for a plurality of accessory systems, which are connected via said power line PL in loop lay-out, wherein a power control module (PCM)  20  for controlling the engine is connected to the power supply source via another power line  22  different from the power line PL.

TECHNICAL FIELD

The present invention relates to an electric power supply system for avehicle, and particularly to an electric power supply system for use ina vehicle such as an automobile and the like, in which an electric poweris supplied to electrical loads from a power supply source such as abattery for an automobile.

BACKGROUND ART

In a conventional electric power supply for a vehicle, for example, inan electrical power supply system for an automobile, in order to supplypower from a battery to its electrical loads such as lamps, motors andthe like, a plurality of power lines are laid out for connecting betweenrespective electrical loads and the battery. For a recent automobile,which has an increased number of electrical loads compared to theconventional automobile, the number of power lines has increasedsignificantly. Further, because it is necessary to provide power linesnot only for connection between respective electrical loads and thebattery but also for connection between switches that control therespective electrical loads and the battery, a total distance ofextension of the power lines has increased substantially. Any suchincreases in the number of power supplies and the total distance ofextension of power lines, which leads to an increase in weight of thevehicle body, will deteriorate fuel mileage.

Therefore, for example, as described in the brochure of InternationalPublication WO 96/26570 (1996), it is proposed that by connecting aplurality of relay circuits (control modules) to a power line which islaid out in a loop, then a plurality of electrical loads are connectedrespectively to each of these relay circuits through which to supplypower thereto.

However, the prior art disclosed in the brochure of InternationalPublication WO 96/26570 (1996) is associated with one problem thatbecause every control modules are connected to a single loop power line,if a fault occurs in one of the control modules, the other controlmodules may be affected, and in a worst case, it becomes difficult tocontrol the engine itself, which is an essential function for theautomobile.

Further, the prior art disclosed in the brochure of the InternationalPublication WO 96/26570 (1996) is associated with a second problem aswill be described below. Although when the power line isshort-circuited, its electrical loads are isolated from the power lineby operating its switching devices, no countermeasure, however, is takenfor a case where an over-current flows through an electrical load due tofailure in the electrical load itself or the like. In order to preventthe occurrence of over-current, a fuse may be used. However, in order toimprove easiness of fuse exchange, it has been preferred to place aplurality of fuses in one concentrated area. In order to place theplurality of fuses in one concentrated area, it becomes necessary toprovide for additional power lines to connect between the plurality offuses that are placed in one concentrated area and their associatedelectrical loads, consequently failing to reduce the length of the powerlines.

The prior art technologies similar to the above are disclosed in thefollowing documents. JPA Laid-Open Nos. 9-275632, 10-4632, 10-20970,U.S. Pat. Nos. 4,652,853 and 4,739,183.

DISCLOSURE OF INVENTION

A first object of the invention is to provide for an electric powersupply apparatus for a vehicle, which minimizes proliferation of adverseeffect on the other control modules than that is directly involved.

A second object of the invention is to provide for an electric powersupply apparatus for the vehicle, which can reduce a total length of itspower lines.

(1) The above objects of the invention can be accomplished by provisionof an electric power supply system which is comprised of: an electricpower source, a plurality of control modules for a plurality ofaccessory systems connected to the electric power source via a powerline; and a power control module for controlling a drive source of thevehicle, which is connected to the electric power source via anotherpower line that is different from the above-mentioned power line.

According to this arrangement described above, because of the provisionof the another power line for supplying power of PCM for controlling theengine itself, which is independent from the power line PL for theaccessory systems, PCM 20 for controlling the engine is ensured tofunction normally even if a failure of the control modules for theaccessory systems occurs.

(2) The above objects of the invention can be accomplished by provisionof an arrangement which is comprised of: an electric power source; aplurality of control modules for a plurality of accessory systems, whichare connected to the electric power source via electric power line; andan air-conditioner, which is connected to the electric power source viaanother power line that is different from the above-mentioned powerline.

According to this arrangement of the invention, because of the provisionof a dedicated power line for the air-conditioner that consumes a largeelectric current independent from the power line PL for the accessorysystems, normal operation of the automobile is ensured even if theair-conditioner fails.

(3) The above-mentioned objects of the invention can be accomplished byprovision of an arrangement which is comprised of: an electric powersource; a plurality of control modules for a plurality of accessorysystems connected to the electric power source via power lines; and aninformation device that is connected via another power line which isdifferent from the above-mentioned power lines.

According to this arrangement of the invention, because of the provisionof a dedicated power line for the auxiliary information device thatassists the operation of the automobile independent from the power linesPL for the accessory systems, the normal operation of the automobile isensured even if the information device fails.

(4) The above-mentioned objects of the invention can be accomplished byprovision of an arrangement which is comprised of: an electric powersource; a plurality of control modules for a plurality of accessorysystems connected to the electric power source via power lines; aplurality of input means for inputting an input signal to these controlmodules; a plurality of electrical loads; a plurality of switch deviceseach connected between the electric power line and the plurality ofelectrical loads, and having a protection function; and a signal linefor transmitting a signal between the plurality of the control modulesfor the plurality of the accessory systems, wherein by using dataprocessing means provided at least in one of the plurality of thecontrol modules for the plurality of accessory systems, the switchdevice is controlled in response to an input signal from the input meansso as to supply power from the power source to the electrical load viathe power line.

According to this arrangement as described above, because the electricalload is supplied with power from supply line PL via its switching devicethat is controlled by its control module, it becomes possible to reducethe number of power lines, and further, by using as its switching devicea MOS FET provided with a protective function, which can prevent for atotal length of the power line from increasing due to a necessity of itslengthy layout, it becomes possible to minimize the power lines in theelectric power supply system for the vehicle.

(5) The first and the second objects of the invention can beaccomplished by provision of an arrangement according to the inventionthat is comprised of: a power source; a plurality of control modules fora plurality of accessory systems connected to this power source via apower line; a switching device that is connected between the power lineand an electrical load, has a protective function, and is controlled inresponse to a signal from the control module so as to supply power tothe electrical load from the power source via the power line; and apower control module that is connected to the power source via anotherpower line different from the above-mentioned power line for controllingthe drive source of the vehicle.

According to this arrangement of the invention, because of the provisionof an independent power line for supplying power to PCM for controllingthe engine itself, which is different from the power line PL for theaccessory systems, it becomes possible for PCM 20 which executes theengine control to be ensured to operate normally even if there occurs afailure in the other control modules for the accessory systems. Further,because the electrical load is supplied with power from the power linePL via the switching device that is controlled by the control moduleassociated therewith, it becomes possible to reduce the number of powerlines. Still further, because the MOS FET provided with the protectivefunction is used as its switching device, which can prevent for thetotal length of the power lines from increasing due to a lengthyextension of layout of the power lines, the length of the power lines inthe electric power supply system for the vehicle can be minimized.

BRIEF DESCRIPTION OF THE DRAWINGS

Other objects and features of the invention will become apparent fromthe following description of embodiments with reference to theaccompanying drawings, in which:

FIG. 1 is a schematic diagram indicating a system configuration of anautomobile according to one embodiment of the invention;

FIG. 2 is a schematic block diagram indicating a connection relationbetween control modules in an electric power supply system for a vehicleaccording to one embodiment of the invention;

FIG. 3 is a schematic block diagram of a BCM in the electric powersupply system for vehicle according to the one embodiment of theinvention;

FIG. 4 is a drawing of an input bit map at module address “#0” of BCMaccording to this embodiment of the invention;

FIG. 5 is a drawing of an input bit map at module address “#1” of BCMaccording to the embodiment of the invention;

FIG. 6 is a drawing of an output bit map of BCM according to theembodiment of the invention;

FIG. 7 is a schematic block diagram of a VCM in the electric powersupply system for automobile according to one embodiment of theinvention;

FIG. 8 is a drawing of an input bit map at module address “#2” of VCMaccording to the embodiment of the invention;

FIG. 9 is a schematic block diagram of an FIM in the electric powersupply system for automobile according to one embodiment of theinvention;

FIG. 10 is an I/O bit map drawing at module address “#3” of FIMaccording to the embodiment of the invention;

FIG. 11 is a schematic block diagram of DDM in the electric power supplyapparatus for automobile according to one embodiment of the invention;

FIG. 12 is an I/O bit map drawing at module address “#4” of DDMaccording to the embodiment of the invention;

FIG. 13 is a schematic block diagram of RIM in the electric power supplyapparatus in the automobile according to one embodiment of theinvention;

FIG. 14 is an I/O bit map drawing at module address “#5” of RIMaccording to the embodiment of the invention;

FIG. 15 is a schematic block diagram of CCM in the electric power supplyapparatus according to one embodiment of the invention;

FIG. 16 is an input bit map drawing at module address “#6” of CCMaccording to the embodiment of the invention;

FIG. 17 is a schematic block diagram of PDM in the electric power supplyapparatus for the automobile according to one embodiment of theinvention;

FIG. 18 is an I/O bit map drawing at module address “#7” of PDMaccording to the embodiment of the invention;

FIG. 19 is a drawing indicating a list of control tasks in an electricpower supply system for the automobile according to one embodiment ofthe invention;

FIG. 20 is a function block diagram indicating a control specificationfor a front-turn-signal control in the electric power supply system forthe automobile according to one embodiment of the invention;

FIG. 21 is a programming flowchart of the front-turn-signal control taskto be executed by CPU in the electric power supply system for theautomobile according to one embodiment of the invention;

FIG. 22 is a function block diagram indicating a control specificationfor a rear-turn-signal control in the electric power supply system forthe automobile according to one embodiment of the invention;

FIG. 23 is a programming flowchart for a rear-turn-signal control taskto be executed by CPU in the electric power supply system for theautomobile according to one embodiment of the invention;

FIG. 24 is a function block diagram indicating a control specificationfor a backup-lamp control in the electric power supply system for theautomobile according to one embodiment of the invention;

FIG. 25 is a programming flowchart of a backup-lamp control task to beexecuted by CPU in the electric power supply system for the automobileaccording to one embodiment of the invention;

FIG. 26 is a function block diagram indicating a control specificationfor a front-rear-light control in the electrical power supply system forthe automobile according to one embodiment of the invention;

FIG. 27 is a programming flowchart of a front-rear-light control task tobe executed by CPU in the electric power supply system for theautomobile according to one embodiment of the invention;

FIG. 28 is a function block diagram indicating a control specificationfor a head lamp control in the electric power supply system for theautomobile according to one embodiment of the invention;

FIG. 29 is a programming flowchart for a head lamp control task to beexecuted by CPU in the electric power supply system for the automobileaccording to one embodiment of the invention;

FIG. 30 is a function block diagram indicating a control specificationfor a rear wiper intermittent control in the electric power supplysystem for the automobile according to one embodiment of the invention;

FIG. 31 is a programming flowchart of a rear wiper intermittent controltask to be executed by CPU in the electric power supply system for theautomobile according to one embodiment of the invention;

FIG. 32 is a function block diagram indicating a control specificationfor a rear wiper washer control in the electric power supply system forthe automobile according to one embodiment of the invention;

FIG. 33 is a programming flowchart of a rear wiper washer control taskto be executed by CPU in the electric power supply system for theautomobile according to one embodiment of the invention;

FIG. 34 is a function block diagram indicating a control specificationfor a rear defogger control in the electric power supply system for theautomobile according to one embodiment of the invention;

FIG. 35 is a programming flowchart of a rear defogger control task to beexecuted by CPU in the electric power supply system for the automobileaccording to one embodiment of the invention;

FIG. 36 is a function block diagram indicating a control specificationfor the rear defogger control in the electric power supply system forthe automobile according to one embodiment of the invention;

FIG. 37 is a programming flowchart of a rear defogger control task to beexecuted by CPU in the electric power supply system for the automobileaccording to one embodiment of the invention;

FIG. 38 is a programming flowchart of a rear defogger control task to beexecuted by CPU in the electric power supply system for the automobileaccording to one embodiment of the invention;

FIGS. 39(A)-(C) are function block diagrams indicating controlspecifications for sheet belt alarm control in the electric power supplysystem for the automobile according to one embodiment of the invention;

FIG. 40 is a programming flowchart of a sheet belt alarm control task tobe executed by CPU in the electric power supply system for theautomobile according to one embodiment of the invention;

FIG. 41 is a programming flowchart of a sheet belt alarm control task tobe executed by CPU in the electric power supply system for theautomobile according to one embodiment of the invention;

FIG. 42 is a function block diagram indicating a control specificationfor a key-forget alarm control in the electric power supply system forthe automobile according to one embodiment of the invention;

FIG. 43 is a programming flowchart of a key-forget alarm control task tobe executed by CPU in the electrical power supply system for theautomobile according to one embodiment of the invention;

FIG. 44 is a function block diagram indicating a control specificationfor a light-on forget alarm control in the electric power supply systemfor the automobile according to one embodiment of the invention;

FIG. 45 is a programming flowchart of a light-on forget alarm controltask to be executed by CPU in the electric power supply system for theautomobile according to one embodiment of the invention;

FIG. 46 is a function block diagram indicating a control specificationfor a room lamp turn-on control in the electric power supply system forthe automobile according to one embodiment of the invention;

FIG. 47 is a programming flowchart of a room lamp turn-on control taskto be executed by CPU in the electric power supply system for theautomobile according to one embodiment of the invention;

FIG. 48 is a programming flowchart of a room lamp turn-on control taskto be executed by CPU in the electric power supply system for theautomobile according to one embodiment of the invention;

FIG. 49 is a flowchart indicating a control specification for a doormirror control in the electric power supply system for automobileaccording to one embodiment of the invention;

FIG. 50 is a program flowchart of a door mirror control task to beexecuted by CPU in the electric power supply system for automobileaccording to one embodiment of the invention;

FIG. 51 is a program flowchart of a door mirror control task to beexecuted by CPU in the electric power supply system for automobileaccording to one embodiment of the invention;

FIG. 52 is a function block diagram indicating a control specificationfor an accessory power supply control in the electric power supplysystem for automobile according to one embodiment of the invention;

FIG. 53 is a program flowchart of an accessory power supply control taskto be executed by CPU in the electric power supply system for automobileaccording to one embodiment of the invention;

FIG. 54 is a function block diagram indicating a control specificationfor an IGN power supply control in the electric power supply system forautomobile according to one embodiment of the invention;

FIG. 55 is a program flowchart of an IGN power supply control task to beexecuted by CPU in the electric power supply system for automobileaccording to one embodiment of the invention;

FIG. 56 is a function block diagram indicating a control specificationfor a rear gate release control in the electric power supply system forautomobile according to one embodiment of the invention;

FIG. 57 is a program flowchart of a rear gate release control task to beexecuted by CPU in the electric power supply system for automobileaccording to one embodiment of the invention;

FIG. 58 is a function block diagram indicating a control specificationfor a shift interlock control in the electric power supply system forautomobile according to one embodiment of the invention;

FIG. 59 is a program flowchart of an shift interlock control task to beexecuted by CPU in the electric power supply system for automobileaccording to one embodiment of the invention;

FIG. 60 is a function block diagram indicating a control specificationfor a high-mount stop lamp control in the electric power supply systemfor automobile according to one embodiment of the invention;

FIG. 61 is a program flowchart of a high-mount stop lamp control task tobe executed by CPU in the electric power supply system for automobileaccording to one embodiment of the invention;

FIG. 62 is a function block diagram indicating a control specificationfor a horn sounding control in the electric power supply system forautomobile according to one embodiment of the invention;

FIG. 63 is a program flowchart of a horn sounding control task to beexecuted by CPU in the electric power supply system for automobileaccording to one embodiment of the invention;

FIG. 64 is a function block diagram indicating a control specificationfor a rear-dome lamp control in the electric power supply system forautomobile according to one embodiment of the invention;

FIG. 65 is a program flowchart of a rear-dome lamp control task to beexecuted by CPU in the electric power supply system for automobileaccording to one embodiment of the invention;

FIG. 66 is a function block diagram indicating a control specificationfor a battery indicator control in the electric power supply system forautomobile according to one embodiment of the invention;

FIG. 67 is a program flowchart of a battery indicator control task to beexecuted by CPU in the electric power supply system for automobileaccording to one embodiment of the invention;

FIG. 68 is a function block diagram indicating a control specificationfor a brake warning lamp control in the electric power supply system forautomobile according to one embodiment of the invention;

FIG. 69 is a program flowchart of a brake warning lamp control task tobe executed by CPU in the electric power supply system for automobileaccording to one embodiment of the invention;

FIG. 70 is a function block diagram indicating a control specificationfor a DRL indicator control in the electric power supply system forautomobile according to one embodiment of the invention;

FIG. 71 is a program flowchart of a DRL indicator control task to beexecuted by CPU in the electric power supply system for automobileaccording to one embodiment of the invention;

FIG. 72 is a function block diagram indicating a control specificationfor an ABS alarm control in the electric power supply system forautomobile according to one embodiment of the invention;

FIG. 73 is a program flowchart of an ABS alarm control task to beexecuted by CPU in the electric power supply system for automobileaccording to one embodiment of the invention;

FIG. 74 is a function block diagram indicating a control specificationfor an MIL turn-on control in the electric power supply system forautomobile according to one embodiment of the invention;

FIG. 75 is a program flowchart of a MIL turn-on control task to beexecuted by CPU in the electric power supply system for automobileaccording to one embodiment of the invention;

FIG. 76 is a program flowchart of a MIL turn-on control task to beexecuted by CPU in the electric power supply system for automobileaccording to one embodiment of the invention;

FIG. 77 is a function block diagram indicating a control specificationfor a CCM data transfer control in the electric power supply system forautomobile according to one embodiment of the invention;

FIG. 78 is a program flowchart of a CCM data transfer control task to beexecuted by CPU in the electric power supply system for automobileaccording to one embodiment of the invention;

FIG. 79 is a function block diagram indicating a control specificationfor a PRNDL decoder control in the electric power supply system forautomobile according to one embodiment of the invention;

FIG. 80 is a program flowchart of a PRNDL decoder control task to beexecuted by CPU in the electric power supply system for automobileaccording to one embodiment of the invention;

FIG. 81 is a function block diagram indicating a control specificationfor a door's power-driven window control in the electric power supplysystem for automobile according to one embodiment of the invention;

FIG. 82 is a program flowchart of a door's power-driven window controltask to be executed by CPU in the electric power supply system forautomobile according to one embodiment of the invention;

FIG. 83 is a program flowchart of a door's power-driven window controltask to be executed by CPU in the electric power supply system forautomobile according to one embodiment of the invention;

FIG. 84 is a function block diagram indicating a control specificationfor a stop lamp diagnosis control in the electric power supply systemfor automobile according to one embodiment of the invention; and

FIG. 85 is a program flowchart of a stop lamp diagnosis control task tobe executed by CPU in the electric power supply system for automobileaccording to one embodiment of the invention.

BEST MODE FOR CARRYING OUT THE INVENTION

An electric power supply system for a vehicle according to one preferredembodiment of the invention will be described, in particular, by way ofexample as applied to an automobile, with reference to accompanyingdrawings of FIGS. 1-85 in the following.

To begin with, a total system configuration of an automobile whichapplies an electric power supply system for a vehicle according to onepreferred embodiment of the invention will be described in reference toFIG. 1.

FIG. 1 is a schematic diagram indicating a system configuration of anautomobile according to one embodiment of the invention.

A battery 10 is connected to a power line PL via a fusible link 12.Power line PL, which is provided in a loop of one turn circuit in anautomobile, extends from a front engine room of the automobile runningthrough a left-hand side door section, a rear section of the car and aright-hand side door section, and returns to the front engine room. Topower line PL are connected seven control modules for seven differentaccessory systems, which include a body control module (BCM) 100, avehicle control module (VCM) 110, a front integrated module (FIM) 120, adriver door module (DDM) 130, a rear integrated module (RIM) 140, acruise control module (CCM) 150, and a passenger door module (PDM) 160,which are supplied power from battery 10.

Body control module (BCM) 100 is disposed in the vicinity of a dashboardin the car. Switch 102 in the vicinity of a steering wheel and inputmeans such as remote control receiver circuit and the like are connectedto BCM 100. Also, electrical loads such as indicator 104, solenoid 106,buzzer 108 and lamp 109 which is a room light are connected to BCM 100.This BCM 100 has a built-in central processing unit (CPU).

Vehicle control module (VCM) 110 is installed within the engine room,and to which input means such as a vehicle speed detector, enginerevolution detector and the like are installed.

Front integrate module (FIM) 120 is positioned in the front side of theengine room. FIM 120 is connected with input means such as switch 121and the like which are provided for an automatic transmission (A/T), andfurther with lamps and electrical loads such as left and right-hand headlamps 122R, 122L, vehicle's side lamps 123R, 123L, turn/stop lamps 124R,124L and the like.

Driver door module (DDM) 130 is installed within a door beside thedriver. DDM 130 is connected with input means such as switch 132 and thelike including a power window switch, mirror switch and the like, andfurther with electrical loads such as motor 134 including a power windowmotor, door lock motor and the like as well as lamps 136 such as doorillumination lamps or the like.

Rear integrate module (RIM) 140 is installed on the backward side of arear seat. RIM 140 is connected with input means such as switches 141and the like including power window switches 141R, 141L provided at theleft and right side doors of the rear seat, an end gate switch providedat an end gate, and further with other electric loads including motors142, 142R, 142L such as power window motors, door lock motors, lampssuch as left and right turn/stop lamps 143R, 143L, tail light 144R,144L, a center stop lamp (high mount lamp) 145, backup lamp 146 forilluminating a reverse direction, as well as with solenoid 147 for endgate release, heater 148 for use as a rear defogger, rear dome lamp 149mounted in the ceiling over the rear seat, and the like. This automobileaccording to the embodiment of the invention is provided, in addition toa driver's side door, a driver's opposite side door, left and right sidedoors at the rear seat, with an end gate at the rear side of the bodywhich opens in a downward direction and a lift gate which is provided inthe upper direction of the end gate and jumps upward. The same also usesa turn/stop lamp which serves as a turn signal lamp and a stop lamp incombination.

Cruise control module (CCM) 150 is installed within the engine room, andto which are connected input means such as a switch 152, a cruisecontroller and the like which are provided in the vicinity of a brakepedal.

Passenger door module (PDM) 160 is provided inside the door at thedriver's side. PDM 160 is connected with input means such as switch 162and the like including the power window switches, door mirror switchesand the like, and with motor 164 such as the power window motors, doorlock motors and the like, as well as with other electric loads such aslamp 166 including the door illumination lamps and the like.

BCM 100, VCM 110, FIM 120, DDM 130, RIM 140, CCM 150 and PDM 160 aremutually connected by a signal line SL that is laid out in a loop turn.VCM 110, FIM 120, DDM 130, RIM 140, CCM 150 and PDM 160 do not havetheir own CPU provided therein, however, instead thereof, they areprovided with a built-in communication IC, respectively. Any signalinput into control modules other than BCM 100 is controlled by its owncommunication IC to be transmitted through signal line SL to BCM 100 andto be entered into CPU within BCM 100. The CPU, after executing anecessary signal processing thereof, transmits the processed signal toeach control module via signal line SL so as to control accordingly theelectric load connected to each control module.

Further, according to this embodiment of the invention, battery 10 isconnected to power train module (PCM) 20 provided within the engine roomvia fusible link 14 and power line 22 for supplying power from battery10. It should be noted that power line 22 is a separate power linedifferent from the power line PL in the loop. PCM 20 executes startingof the engine using starter motor 24, control of quantity of fuelinjection into the engine by injector 26, ignition timing control, andautomatic transmission (A/T) control. PCM 20 is connected with sensorssuch as air-flow meter, water temperature sensor and the like, andfurther with actuators such as for injector 26, cooling fan motor andthe like.

PCM 20 is provided specifically for carrying out control of the engineitself. If a malfunction occurs in other control modules such as BCM100, CCM 110 or the like, and if the engine control is affected, theultimate object and function of the engine control basically requiredfor the control of the automobile cannot be achieved. However, it iscontemplated according to the invention that if BCM 100, CCM 110 or thelike which are connected to the power line PL in the loop turn fails, itmerely follows that the power window does not operate or that the lampsdo not turn on, which are not immediately a serious trouble and can betolerated for a while until the automobile is managed to get to a repairshop without using such troubled functions.

Therefore, according to this embodiment of the invention, a power supplyto PCM 20 that executes the ultimate function of the engine control isensured using the power line 22 independent from the power line PL inthe loop. Therefore, even if other control modules such as BCM 100, CCM110 or the like provided for accessory systems fail, and if PCM 20 forcarrying out the engine control is ensured to operate normally, itbecomes possible to manage to drive the automobile to a repair shop.

Further, sensors which are input means to PCM 20 and injectors which areactuators and the like are accommodated in a relatively compact spacewithin the engine room, and also the battery is placed therein.Therefore, even if the power line PL in loop is not used in the instantcase and a separate power line independent therefrom is used, thereoccurs no particular problem because it does not incur any substantialincreases in the number of wiring and/or length thereof.

Still further, according to the embodiment of the invention, battery 10is connected to air-conditioner (A/C) 30 which is provided within thepassenger room via fusible link 16 and power line 32 for supplying powerfrom the battery. Power line 32 is a separate power line different fromthe loop-turn power line PL. A/C 30 which is provided with a blowermotor therein consumes a large electric current. Therefore, compared toother control modules such as BCM 100 or FIM 110 that consumes arelatively small current, A/C 30 is more likely to have a greaterfrequency of failures. Even if A/C 30 fails, it does not affect thenormal drive operation of the automobile itself. On the other hand,priority level of control of BCM 100, FIM 110 or the like is higher thanthat of A/C 30. If, however, control modules of BCM 100 and FIM 120 faildue to the failure of A/C 30, there occurs such a problem that the stoplamp or head lamp will not illuminate. Therefore, according to theembodiment of the invention, power line 32 for supplying power to A/C 30which consumes a large current is provided independently from the powerline PL in the loop circuit.

Still further, according to the embodiment of the invention, battery 10is connected to navigation system (Navi)40 via fusible link 18 and powerline 42 for supplying power from the battery. Power line 42 is aseparate power line independent from the loop-circuit power line PL.Navi 40 is an auxiliary information device which can assist the driverwith guidance to a destination and the like. Therefore, even if Navi 40fails, there will be no serious trouble such as to prevent the normaldrive operation of the automobile. On the other hand, priority level ofthe control modules such as BCM 100 and FIM 120 is higher than that ofNavi 40, and if the control modules of BCM 100 and FIM 120 go down dueto a failure of Navi 40, there occurs such inconveniences that the stoplamp or head lamp will not turn on. Therefore, according to theembodiment of the invention, power line 32 for supply power to Navi 40which is auxiliary information device is provided independently from thepower line PL in loop circuitry. Other such information devices include,for example, a beacon and the like.

As described above, PCM 20 that carries out the fundamental enginecontrol, A/C 30 that consumes a large current, and Navi 40 that is theauxiliary information device and the like are ensured to be suppliedwith power using their own power lines which are provided independentlyof the power line PL in loop turn that supplies power to BCM 100, FIM120 and the like. Therefore, mutual adverse influences betweenrespective control modules can be minimized according to the invention.

Further, because the control modules such as BCM 100, FIM 120 and thelike are supplied power via power line PL in the loop turn, the lengthof the power line can be minimized.

FIG. 2 is a block diagram indicating a connection relationship betweencontrol modules in an electric power supply system for a vehicleaccording to one embodiment of the invention. It should be noted thatFIG. 2 depicts only a part of the arrangement of FIG. 1, relating tocontrol modules therein.

Seven units of control modules including BCM 100, VCM 110, FIM 120, DDM130, RIM 140, CCM 150 and PDM 160 are connected to the power line PL ina loop turn for supplying power from the battery 10. Further, BCM 100,VCM 110, FIM 120, DDM 130, RIM 140, CCM 150 and PDM 160 are connectedmutually via signal line SL that is provided also in a loop turn.

BCM 100 is provided with a central processing unit (CPU) for executingarithmetic operation for control processing, and a communication IC forcontrolling data transmission to and from other communication ICs. VCM110, FIM 120, DDM 130, RIM 140, CCM 150 and PDM 160 excepting for BCM100 are not provided with a CPU, but, instead thereof, are provided withbuilt-in communication ICs 210, 220, 230, 240, 250 and 260,respectively.

A signal input into any control module other than BCM 100 is controlledby its own built-in communication IC to be transmitted serially viasignal line SL to communication IC 205 within BCM 100 through which tobe entered into its CPU 200. After executing a required signalprocessing, CPU 200 transmits its processed signal via communication IC200 and signal line SL to respective communication ICs 210, 220, 230,240, 250 and 260 in respective control modules, thereby providing acontrol signal to respective electrical loads connected to respectivecontrol modules so as to control the loads accordingly. Further, in caseof any control logic wherein a relation between an input signal and anoutput signal corresponding thereto is simple, it may be arranged suchthat they are processed in its communication IC discretely.

Here, it should be noted that each control module is assigned with itsunique nodule number. A module number of BCM 100 is assigned “#1”, amodule number of VCM 110 is assigned “#2”, a module number of FIM 120 isassigned “#3” , a module number of DDM 130 is assigned “#4”, a modulenumber of RIM 140 is assigned “#5”, a module number of CCM 150 isassigned “#6”, and a module number of PDM 160 is assigned “#7”.

Respective communication ICs 210, 220, 230, 240, 250 and 260 areassigned with a unique module address. When transmitting communicationdata, a particular communication IC of a sender and a particularcommunication IC of a receiver are specified using this module address.A unique module address of built-in communication IC 205 of BCM 200 isassigned “#1”. However, because of presence of too many numbers of inputsignals, a unique module number of “#0” is assigned internally. Morespecifically, built-in communication IC 210 inside VCM 110 is assigned aunique module address “#2”, communication IC 220 inside FIM 120 isassigned a unique module address “#3”, communication IC 230 inside DDM130 is assigned a unique module address “#4”, communication IC 240inside RIM 140 is assigned a unique module address “#5”, communicationIC 250 inside CCM 150 is assigned a unique module address “#6”, andcommunication IC 260 inside PDM 160 is assigned a unique module address“#7”, respectively.

CPU 200 in BCM 100 has an input signal number of 31 bits and an outputsignal number of 28 bits. Communication IC 210 in VCM 110 has an inputsignal number of 19 bits and an output signal number of 0 bit.Communication IC 220 in FIM 120 has an input signal number of 11 bitsand an output signal number of 11 bits. Communication IC in DDM 130 hasan input signal number of 21 bits and an output signal number of 9 bits.Communication IC 240 in RIM 140 has an input signal number of 12 bitsand an output signal number of 17 bits. Communication IC 250 in CCM 150has an input signal number of 0 bit and an output signal number of 5bits. Communication IC 260 in PDM 160 has an input signal number of 6bits and an output signal number of 9 bits.

Now, with reference to FIGS. 3-6, an internal construction of BCM 100,input means and electric loads connected to the CPU in BCM 100 as wellas input signals and output signals will be described in the following.

FIG. 3 is a schematic block diagram of BCM in the electric power supplysystem for automobiles according to one embodiment of the invention.FIG. 4 is an input bit map flowchart at module address “#0” of BCMaccording to the embodiment of the invention. FIG. 5 is an input bit mapflowchart at module address “#1” of BCM according to the embodiment ofthe invention. FIG. 6 is an output bit map flowchart of BCM according tothe embodiment of the invention.

With reference to FIG. 3, BCM 100 is comprised of CPU 200, communicationIC 205, power line circuit 202, input circuit 204 and output circuit206. Communication IC 205 is connected between signal line SL and CPU200. Communication IC 205 fetches data transmitted via signal line SLinto CPU 200, and transmits control data obtained by arithmeticoperation in CPU 200 to other control modules via signal line SL.

Power source circuit 202 which is connected to power line PL converts apower supplied from the battery into a predetermined voltage suitablefor operating CPU 200 and communication IC 205, for supplying a voltageto input circuit 204 for entry of input signals, and also for supplyinga voltage for actuating electrical loads connected to output circuit206.

Input circuit 204, which is an input interface for input means such asswitches and the like, enters each status of each switch and the likeinto CPU 200 via each input terminal 1-n and 2-m. Further, outputcircuit 206, in response to an output signal which is output from outputterminal o-I-1 of CPU 200, drives MOSFET which is a switching deviceprovided with a protection function for supplying power from powersource circuit 202 to each electric load.

Now, with reference to FIGS. 3-5, a relation between an input signal atan input terminal of CPU 200 and its input means will be described. Asfor a control method based on the signal input from the input means, itwill be described later with reference to FIGS. 21 and subsequentfigures describing function block diagrams and programming flowcharts ofrespective control specifications.

As shown in FIG. 4, a first input terminal BCM1 specified by address“#0” of BCM is comprised of 32 bits, and wherein bits 21 to 23 and bit28 are not used.

As shown in FIG. 3, a signal of hazard switch (Hazard sw) 301 forsimultaneously flashing four turn signal lamps 124R, 124L, 143R and 143Lwhich are indicated in FIG. 1 is input at bit 0 (1-0) of BCM1. Whenswitch 301 is off-state, the input signal is set at “H” level by avoltage supplied from power source circuit 202 through a resistance ininput circuit 204. When switch 301 is on-state, the input signal becomes“L” level. By the way, as will be described later, a variable name ofthe input signal on a control program is given by “iHazardSw”.

At bit 1 (1-1) of BCM1, a signal of turn switch (Turn Sw) 302 forsimultaneously flashing two of right turn signal lamps 124R and 143R outof four turn signal lamps 124R, 124L, 143R and 143L is input. Whenswitch 302 is off-state, its input signal is set at “H” level by avoltage supplied from power source circuit 202 via a resistance in inputcircuit 204. When switch 302 is switched to R side, its input signalbecomes “L” level. By the way, as will be described later, a variablename of its input signal is given by “iTrnSwRH” in a control program.

At bit 2 (1-2) of BCM1, a signal of turn switch (Turn sw) 302 forsimultaneously flashing two of left side turn signal lamps 124L and 143Lout of four turn signal lamps 124R, 124L, 143R and 143L is input. Whenswitch 302 is off-state, its input signal is set at “H” level. Whenswitch 302 is switched to L side, its input signal becomes “L” level. Bythe way, as will be described later, a variable name of its input signalon its control program is given by “iTrnSwLH”.

At bit 3 (1-3) of BCM1, a signal of park lamp switch (Park lamp sw) 303for simultaneously turning on four of the side width indicator lamps123R, 123L and tail light lamp 144R and 144L which are depicted in FIG.1 is input. When switch 303 is off-state, its input signal is set at “H”level by a voltage supplied via a resistance in input circuit 204 frompower source circuit 202. When switch 303 becomes on-state, its inputsignal become “L” level. By the way, as will be described later, avariable name of its input signal is given by “iPosOn” on its controlprogram.

At bit 4 (1-4) of BCM1, a signal of accessory switch (Key sw Acc sw) 304in a key switch, which is operated when an engine key in switch 102depicted in FIG. 1 is turned to a position of accessory (Acc), is input.When switch 304 is off-state, its input signal is set at “H” level by avoltage supplied from power source circuit 202 via a resistance in inputcircuit 204. When switch 304 becomes on-state, its input signal becomes“L” level. By the way, as will be described later, a variable name ofits input signal on its control program is given by “iLGswAcc”.

At bit 5 (1-5) of BCM1, a signal of ignition “1” switch (Key sw IGN(RUN)1 sw) 305 in the key switch, which is operated when the engine keyin switch 102 depicted in FIG. 1 is turned to a position of ignition “1”(IGN1), is input. When switch 305 is off-state, its input signal is setat “H” level by a voltage supplied from power source circuit 202 via aresistance in input circuit 204. When switch 305 is on-state, its inputsignal becomes “L” level. By the way, as will be described later, avariable name of its input signal on its control program is given by“iIGswOn_1”.

At bit 6 (1-6) of BCM1, a signal of ignition “2”, switch (Key sw IGN(RUN)2 sw) 306 in the key switch, which is operated when the engine keyin switch 102 depicted in FIG. 1 is turned to a position of ignition “2”(IGN2), is input. When switch 306 is off-state, its input signal is setat “H” level by a voltage which is supplied from power source circuit202 via a resistance in input circuit 204. When switch 306 becomeson-state, its input signal becomes “L” level. By the way, as will bedescribed later, a variable name of its input signal on its controlprogram is given by “iIGswOn_2”.

At bit 8 (1-8) of BCM1, a signal of parking brake warning switch (Parkbrake warning sw (side brake)) 307, which operates when a parking brakein switch 102 shown in FIG. 1 is operated, is input. When switch 307 isoff-state, its input signal is set at “H” level by a voltage suppliedfrom power source circuit 302 through a resistance in input circuit 204.When switch 307 becomes on-state, its input signal becomes “L” level. Bythe way, as will be described later, a variable name of its input signalis given by “iPkBrkWarn” on its control program.

At bit 9 (1-9) of BCM1, a signal of head lamp switch (Head lamp on sw)308, which operates when the head lamp in switch 102 shown in FIG. 1 isto be switched on, is input. When switch 308 is off-state, its inputsignal is set at “H” level by a voltage which is supplied from powersource circuit 202 through a resistance in input circuit 204. Whenswitch 308 becomes on-state, its input signal becomes “L” level. By theway, as will be described later, a variable name of its input signal isgiven by “iLiteOn” on its control program.

At bit 10 (1-10) of BCM1, a signal of cruise release switch (TTC/Cruiserelease sw) 309, which operates when releasing a cruise controller inswitch 102 as shown in FIG. 1, is input. When switch 309 is off-state,its input signal is set at “H” level by a voltage supplied from powersource circuit 202 via a resistance in input circuit 204. When switch309 becomes on-state, its input signal becomes “L” level. By the way, aswill be described later, a variable name of input signal is given by“iCrsRisSw” on its control program.

At bit 11 (1-11) of BCM1, a signal of cruise release switch (Brakelamp/Cruise release sw) 310, which operates when releasing the cruisecontroller by pressing the brake pedal in switch 102 as shown in FIG. 1,is input. When switch 310 is off-state, its input signal is set at “H”level by a voltage supplied from power source circuit 202 through aresistance in input circuit 204. When switch 310 becomes on-state, itsinput signal becomes “L” level. By the way, as will be described later,a variable name of input signal is given by “iBrkSw” on its controlprogram.

At bit 12 (1-12) of BCM1, a signal of stop lamp switch (TTC/Stop lampsw) 311 is input, which is produced to turn on turn/stop lamps 143R and143L by pressing the brake pedal in switch 102 shown in FIG. 1. Whenswitch 311 is off-state, its input signal is set at “H” level by avoltage supplied from power source circuit 202 through a resistance ininput circuit 204. When switch 311 becomes on-state, its input signalbecomes “L” level. By the way, as will be described later, a variablename of input signal is given by “iStopSw” on its control program.

At bit 13 (1-13) of BCM1, a left door switch (LH door jamb Sw) 312 whichis attached to a center pillar (jamb) beside the left door is input,which actuates when the left door in switch 102 shown in FIG. 1 isopened. When switch 312 is off, its input signal becomes “H” level by avoltage supplied from power supply circuit 202 via a resistance in inputcircuit 204. When switch 312 is on, its input signal becomes “L” level.By the way, a variable name of its input signal on the control programwhich will be described later is given by “iDorJamLH”.

At bit 14 (1-14) of BCM1, a signal of a right door switch (RH door jambSw) 313 is input, which switch is attached to a center pillar beside theright-side door, and operates when a right-side door in switch 102 shownin FIG. 1 is opened. When switch 313 is off, its input signal becomes“H” level by a voltage supplied from the power supply circuit 202 via aresistance in input circuit 204. When switch becomes on-state, its inputsignal becomes “L” level. By the way, a variable name of the inputsignal in the control program which will be described later is given by“iDorJamRH”.

At bit 15 (1-15) of BCM1, a signal of a seat belt switch (safety belt onsw) in switch 102 shown in FIG. 102 is input, which operates when adriver's seat belt is set. When switch 314 is off, its input signalbecomes “H” level by a voltage supplied from power supply circuit 202via a resistance in input circuit 204. When switch 314 is on, its inputsignal becomes “H” level. By the way, a variable name of the inputsignal on its control program is given by “iSftyBelt” as will bedescribed later.

At bit 16 (1-16) of BCM1, a signal of a rear wiper washer switch (RearWiper Wash sw) 315 is input, which enables a rear wiper washer in switch102 shown in FIG. 1 to operate to eject. When switch 315 is off, itsinput signal becomes “H” level by a voltage supplied from power supplycircuit 202 via a resistance in input circuit 204. Switch 315 is capableof switching in two modes of position. When switch 315 is turned on inthe second mode, its input signal becomes “L” level. The first mode ofposition is used for operating the rear wiper. By the way, a variablename of the input signal thereof on its control program is given by“iRrWipWash” as will be described later.

At bit 17 (1-17) of BCM1, a signal of rear wiper switch (Rear Wiper sw)315 is input for operating the rear wiper in switch 102 shown in FIG. 1.When switch 315 is off, its input signal is set at “H” level by avoltage supplied from power supply circuit 202 via a resistance in inputcircuit 204. When switch 315 is turned on in the first stage ofposition, its input signal becomes “L” level. By the way, a variablename of the input signal thereof on its control program is given by“iRrWip” as will be described later.

At bit 18 (1-18) of BCM1, a signal of rear window defogger switch (Rearwindow Defogger sw) 316 is input, which enables operation of a rearwindow defogger switch in switch 102 shown in FIG. 1 when the same isdesired to be used. When switch 316 is off, its input signal is set at“H” level by a voltage supplied from power supply circuit 202 via aresistance in input circuit 204. When switch 316 is on, its input signalbecomes “L” level. By the way, a variable name of the input signalthereof on its control program is given by “iDefog” as will be describedlater.

At bit 19 (1-19) of BCM1, a signal of lift gate open switch (Lift gateopen sw) 317 is input, which enables to open the lift gate at the rearend of the body, and is provided in switch 102 shown in FIG. 1. Whenswitch 317 is off, its input signal is set at “H” level by a voltagesupplied from power supply circuit 202 via a resistance in input circuit204. When switch 317 is on, its input signal becomes “L” level. By theway, a variable name of the input signal thereof on its control programis given by “iLftOpn” as will be described later.

At bit 20 (1-20) of BCM1, a signal of panel dimmer switch (Panel Dimmeron sw) 318 in switch 102 shown in FIG. 1 is input, which operates whenturning on an instrument panel illumination. When switch 318 is off, itsinput signal is set at “H” level by a voltage supplied from power supplycircuit 202 via a resistance in input circuit 204. When switch 318becomes on-state, its input signal becomes “L” level. By the way avariable name of the input signal on its control program is given by“iPDimOn” as will be described later.

At bit 24 (1-24) of BCM1, a signal of cruise release switch (CuiseResume/accel sw) 319 in switch 102 shown in FIG. 1 is input, whichoperates for releasing its control while the vehicle is running at aconstant speed under a cruise control by the cruise controller. Whenswitch 319 is off, its input signal is set at “H” level by a voltagesupplied from power supply circuit 202 through a resistance in inputcircuit 204. When switch 319 becomes on-state, its input signal becomes“L” level. By the way, a variable name of the input signal on itscontrol program is given by “iCcmR_A” as will be described later.

At bit 25 (1-25) of BCM1, a signal of cruise set switch (Cruiseset/coast sw) 320 in switch 102 shown in FIG. 1 is input, for causingthe cruise controller to executes its constant speed cruise control.When switch 320 is off, its input signal becomes “H” level by a voltagesupplied from power supply circuit 202 through a resistance in inputcircuit 204. When switch 320 becomes on-state, its input signal becomes“L” level. By the way, a variable name of the input signal on itscontrol program is given by “iCcmS_C” as will be described later.

At bit 26 (1-26) of BCM1, a signal of cruise on/off switch (Cruiseon/off sw) 321 in switch 102 shown in FIG. 1 is input, for turning onand off of the cruise controller itself. When switch 321 is off, itsinput signal is set at “H” level by a voltage supplied from power supplycircuit 202 through a resistance in input circuit 204. When switch 321becomes on-state, its input signal becomes “L” level. By the way avariable name of the input signal on its control program which will bedescribed later is given by “iCcmOnOff”.

At bit 27 (I-27) of BCM1, a signal of horn switch (Horn sw) 322 inswitch 102 shown in FIG. 1 is input, which operates by pressing a hornbutton provided in the steering wheel. When switch 322 is off, its inputsignal is at “H” level by a voltage supplied from power supply circuit202 through a resistance in input circuit 204. When switch 322 becomeson-state, its input signal becomes “L” level. By the way, a variablename of the input signal on its control program which will be describedlater is given by “iHornSw”.

At bit 29 (1-29) of BCM1, a signal of high beam switch (Hi-beam sw) 323in switch 102 shown in FIG. 1 is input, which operates for switching thehead lamp to its high beam. When switch 323 is off, its input signal isset at “H” level by a voltage supplied from power supply circuit 202through a resistance in input circuit 204. When switch 323 becomeson-state, its input signal becomes “L” level. By the way, a variablename of the input signal on its control program which will be describedlater is given by “iHornSw”.

At bit 30 (1-30) of BCM1, a signal to starter switch (Starter sw) 324 inswitch 102 shown in FIG. 1 is input, which operates when actuating thestarter by turning the ignition key to a position of starter. Whenswitch 324 is off, its input signal is at “H” level by a voltagesupplied from power supply circuit 202 through a resistance in inputcircuit 204. When switch 24 is on, its input signal becomes “L” level.By the way, a variable name of the input signal on its control programwhich will be described later is given by “iIGNswST”.

At bit 30 (1-30) of BCM1, a signal to starter switch (Starter sw) 324 inswitch 102 shown in FIG. 1 is input, which operates when actuating thestarter by turning the ignition key to a position of starter. Whenswitch 324 is off, its input signal is at “H” level by a voltagesupplied from power supply circuit 202 through a resistance in inputcircuit 204. When switch 24 is on, its input signal becomes “L” level.By the way, a variable name of the input signal on its control programwhich will be described later is given by “iIGNswST”.

At bit 31 (1-31) of BCM1, a signal to key insertion switch (Key inseertsw) 325 in switch 102 shown in FIG. 1 is input, which operates when theignition key is inserted in the key hole. When switch 325 is off, itsinput signal is at “H” level by a voltage supplied from power supplycircuit 202 through a resistance in input circuit 204. When switch 325becomes on, its input signal becomes “L” level. By the way, a variablename of the input signal on its control program which will be describedlater is given by “iIGNswKey”.

Now, with reference to FIG. 5, a second input terminal BCM2 specified ataddress “#1” of BCM is comprised of 32 bits, of which only bits 24-27are used.

As shown in FIG. 3, at bit 24 (2-24) of BCM2, a signal from a remotecontroller receiver circuit (R/C Rec) 326 is input, the receiver circuitis for receiving a signal sent from a remote controller of a so-calledkeyless entry system carried by the driver and when it is operated. Whena lift gate open switch (R/C Lift-gate open sw) of the remote controllerwhich operates when opening the lift gate at the end of the car body isoff, a signal of “L” level is input. When the lift gate open switchbecomes on, a signal of “H” level is input. By the way, a variable nameof the input signal on its control program which will be described lateris given by “iRcLftOpn”.

At bit 25 (2-25) of BCM2, a signal from the remote controller receivercircuit (R/C Rec) 326 is input. When a door unlock switch of the remotecontroller (R/C Door unlock sw), which operates when releasing all thedoor locks, is off, a signal of “L” level is input. When the door unlockswitch is on, a signal of “H” level is input. By the way, a variablename of the input signal on its control program which will be describedlater is given by “iRcUnlock”.

At bit 26 (2-26) of BCM2, a signal from the remote controller receivercircuit (R/C Rec) 326 is input. When the remote controller's door lockswitch (R/C Door lock sw), which operates when all the doors are to belocked, is off, a signal of “L” level is input. When the door lockswitch is on, a signal of “H” level is input. By the way, a variablename of the input signal on its control program which will be describedlater is given by “iRcLock”.

At bit 27 (2-27) of BCM2, a signal from the remote controller receivercircuit (R/C Rec) 326 is input. When a driver door unlock switch of theremote controller (R/C DR Door unlock sw) which operates when unlockingthe door beside the driver is off, a signal of “L” level is input. Whenthe door lock switch is on, a signal of “H” level is input. By the way,a variable name of the input signal on its control program which will bedescribed later is given by “iRcDrUnlk”.

Now, with reference to FIGS. 3 and 6, each output signal to be outputfrom each output terminal of CPU 200 and each electrical load to becontrolled in response to this output signal from CPU will be describedin the following.

As shown in FIG. 6, output terminal BCMOUT is comprised of four sets of8 bit structure, namely, a total of 32 bit structure, wherein bit (2-3),and bits (3-7) to (3-5) are not used.

As shown in FIG. 3, bit 1-7 (o-1-7) of BCMOUT in CPU 200 is connected toa gate terminal of FET switch circuit (FET SW) 330 comprising a MOSFETwith a protection function provided in output circuit 206. A sourceterminal of FET switch circuit 330 is applied with a predeterminedvoltage from power supply circuit 202. Further, a drain terminal of FETswitch circuit 330 is connected to a defogger indicator (DefoggerIndicator) 360 in indicator 104 shown in FIG. 1 for indicating that arear defogger is operating. Therefore, when an output signal of “H”level is output from bit 1-7 (o-1-7) of BCMOUT, FET switch circuit 330becomes conductive thereby applying the voltage from power supplycircuit 202 to defogger indicator 360 to turn on the same. By the way, avariable name of the input signal thereof on its control program whichwill be described later is given by “oDefogInd”.

Here, a MOSFET with protection function is used as a switching devicewhich constitutes output circuit 206. As the MOSFET with protectionfunction, an over-current detection type MOSFET or an overheat detectiontype MOSFET is used. The over-current detection type MOSFET has afunction to interrupt its switching device when a large current inexcess of a predetermined current flows. Further, the overheat detectiontype MOSFET has a function to interrupt its switching device when itstemperature increases higher than a predetermined temperature due toheating by the flow of an over-current. These MOSFETs with protectionfunction are used in place of conventional fusible link that is usedbetween the battery and respective electrical loads. MOSFETs withprotection function can self-reset when the over-current or over-heatconditions are removed. Therefore, without necessities of a specifiedmaintenance work and of locating a plurality of these in oneconcentrated area as required for the conventional fusible links, theycan be disposed appropriately at any position between power supplycircuit 202 and respective electrical loads indicated in FIG. 3. Inpractice, because CPU 200 and power supply circuit 202 are mounted onthe same substrate of BCM 100, its MOSFET with protection function canbe mounted on the same substrate. Therefore, there will arise no suchproblem associated with the prior art that the total distance ofextension of power lines increases substantially due to additionallaying-out of power lines required for disposing fusible links in oneconcentrated area for ease of maintenance and inspection work. Further,it should be noted that FET switch circuit in the following descriptionis comprised of MOSFET with protection function described above. Stillfurther, the FET switch circuit of the invention can be comprised bycombining a conventional MOSFET and a self-healing type interruptiondevice instead of the MOSFET with protection function within the scopeof the invention.

Bit 1-6 (o-1-6) of BCMOUT of CPU 200 is connected to a gate terminal ofFET switch circuit (FET SW) 331 in output circuit 206. FET switchcircuit 331 is connected to power supply circuit 202 and to an electricload of right turn signal indicator (RH turn Indicator) 361 in indicator104 shown in FIG. 1, which indicates that the right direction turnsignal is in operation. Therefore, when an output signal at “H” level isoutput from bit 1-6 of BCMOUT (o-1-6), FET switch circuit 331 becomesconductive thereby applying a voltage from power supply circuit 202 toright turn signal indicator 361 so as to light up. By the way, avariable name of its output signal on its control program which will bedescribed later is given by “oTrnRHInd”.

Bit 1-5 (o-1-5) of BCMOUT in CPU 200 is connected to a gate terminal ofFET switch circuit (FET SW) 332 in output circuit 206. FET switchcircuit 332 is connected to power supply circuit 202 and to an electricload of left turn signal indicator (LH turn Indicator) 362 in indicator104 shown in FIG. 1, which indicates that the left turn signal is inoperation. Therefore, when an output signal of “H” level is output frombit 1-5 (o-1-5) of BCMOUT, FET switch circuit 332 becomes conductivethereby applying a voltage from power supply circuit 202 to left turnsignal indicator 362 so as to light up. By the way, a variable name ofits output signal on its control program which will be described lateris given by “oTrnLHInd”.

Bit 1-4 of BCMOUT (o-1-4) in CPU 200 is connected to a gate terminal ofFET switch circuit (FET SW) 333 of output circuit 206. FET switchcircuit 333 is connected to power supply circuit 202 and to an electricload of high beam indicator (Hi-Beam Indicator) 363 in indicator 104shown in FIG. 1, which indicates that high beam of the head lamp isturned on. Therefore, when an output of “H” level is output from bit 1-4of BCMOUT (o-1-4), FET switch circuit 333 becomes conductive, therebyapplying a voltage from power supply circuit 202 to high beam indicator363 so as to illuminate the same. By the way, a variable name of theoutput signal on its control program which will be described later isgiven by “oHiBmInd”.

Bit 1-3 of BCMOUT (o-1-3) in CPU 200 is connected to a gate terminal ofFET switch circuit (FET SW) 334 in output circuit 206. FET switchcircuit 334 is connected to power supply circuit 202 and to an electricload of seat belt warning lamp (Safety belt warning) 364 in indicator104 shown in FIG. 1, which indicates that a safety seat belt is notfastened. Therefore, when an output signal of “H” level is output frombit 1-3 of BCMOUT (o-1-3), FET switch circuit 334 becomes conductivethereby applying a voltage from power supply circuit 202 to seat beltwarning lamp 364 so as to illuminate the same. By the way, a variablename of the output signal on its control program which will be describedlater is given by “oSftyBltWan”.

Bit 1-2 of BCMOUT (o-1-2) in CPU 200 is connected to a gate terminal ofFET switch circuit (FET SW) 335 in output circuit 206. FET switchcircuit 335 is connected to power supply circuit 202 and to an electricload of FIM short-circuit detection sensor/short-circuit detectionindicator (FIM short-sensor Fail detect Indicator) 365 in indicator 104shown in FIG. 1, which indicates that the short-circuit detection sensorof FIM 120 has detected a short-circuit event. Therefore, when an outputsignal of “H” level is output from bit 1-2 of BCMOUT (o-1-2), FET switchcircuit 335 becomes conductive thereby applying a voltage from powersupply circuit 202 to FIM short-circuit detection indicator 365 so as toilluminate the same. By the way, a variable name of the output signal onits control program which will be described later is given by“oFIMssInd”.

Bit 1-1 of BCMOUT (o-1-1) in CPU 200 is connected to a gate terminal ofFET switch circuit (FET SW) 336 in output circuit 206. FET switchcircuit 336 is connected to power supply circuit 202 and to an electricload of DDM short-circuit detection sensor/short-circuit detectionindicator (DDM short-sensor Fail detect Indicator) 366 in indicator 104shown in FIG. 1, which indicates that the short-circuit sensor of DDM130 has detected a short-circuit condition. Therefore, when an outputsignal of “H” level is output from bit 1-1 of BCMOUT (o-1-1), FET switchcircuit 336 becomes conductive thereby applying a voltage from powersupply circuit 202 to DDM short-circuit detection indicator 366 so as toilluminate the same. By the way, a variable name of the output signal onits control program which will be described later is given by“oDDMssInd”.

Bit 1-0 of BCMOUT (o-1-0) in CPU 200 is connected to a gate terminal ofFET switch circuit (FET SW) 337 in output circuit 206. FET switchcircuit 337 is connected to power supply circuit 202 and to an electricload of PDM short-circuit detection sensor/short-circuit detectionindicator (PDM short-sensor Fail detect Indicator) 367 in indicator 104shown in FIG. 1, which indicates that the short-circuit detection sensorof PDM 160 has detected a short-circuit condition. Therefore, when anoutput signal of “H” level is output from bit 1-0 of BCMOUT (o-1-0), FETswitch circuit 337 becomes conductive thereby causing to apply a voltagefrom power supply circuit 202 to PDM short-circuit detection indicator367 so as to illuminate the same. By the way, a variable name of theoutput signal on its control program which will be described later isgiven by “oPDMssInd”.

Bit 2-7(o-2-7), bit 2-6 (o-2-6), bit 2-5 (o-2-5) and bit 2-4 (o-2-4) ofBCMOUT in CPU 200 are connected respectively to PRNDL display circuit(PRNDL Cir.) 368, which indicates a shift position of the automatictransmission gears. As will be described later in detail, using 4 bitdata input, PRNDL display circuit 368 displays each shift position of P(parking), R (reverse), N (neutral), D (drive) and L (low) on PRNDLindicator in indicator 104 shown in FIG. 1. By the way, a variable nameof the output signal on its control program which will be describedlater is given by “oPRNDL1”, “oPRNDL2”, “oPRNDL3” and “oPRNDL4”,respectively.

Bit 2-2 of BCMOUT (o-2-2) in CPU 200 is connected to a gate terminal ofFET switch circuit (FET SW) 338 in output circuit 206. FET switchcircuit 338 is connected to power supply circuit 202 and to an electricload of room lamp (courtesy lamp) 369 which is shown as lamp 109 in FIG.1. Therefore, when an output signal of “H” level is output from bit 2-2of BCMOUT (o-2-2), FET switch circuit 338 becomes conductive therebycausing a voltage from power supply circuit 202 to be applied to roomlamp 369 so as to illuminate the same. By the way, a variable name ofthe output signal on its control program which will be described lateris given by “oCortsy”.

Bit 2-1 of BCMOUT (o-2-1) in CPU 200 is connected to a gate terminal ofFET switch circuit (FET SW) 339 in output circuit 206. FET switchcircuit 339 is connected to power supply circuit 202 and to an electricload of RIM short-circuit detection sensor/short-circuit detectionindicator (RIM short-sensor Fail detect Indicator) 370 in indicator 104shown in FIG. 1, which indicates that the short-circuit detection sensorof RIM 140 has detected a short-circuit condition. Therefore, when anoutput signal of “H” level is output from bit 2-1 of BCMOUT (o-2-1), FETswitch circuit 339 becomes conductive thereby causing a voltage frompower supply circuit 202 to be applied to RIM short-circuit detectionindicator 370 so as to illuminate the same. By the way, a variable nameof the output signal on its control program which will be describedlater is given by “oRIMssInd”.

Bit 2-0 of BCMOUT (o-2-0) in CPU 200 is connected to a gate terminal ofFET switch circuit (FET SW) 340 in output circuit 206. FET switchcircuit 340 is connected to power supply circuit 202 and to an electricload of stop lamp load open detection indicator (stop lamp load opendetect Indicator) 371 in indicator 104 shown in FIG. 1, which indicatesa failure of turn/stop lamps 143R, 143L. Therefore, when an outputsignal of “H” level is output from bit 2-0 of BCMOUT (o-2-0), FET switchcircuit 340 becomes conductive thereby causing a voltage from powersupply circuit 202 to be applied to stop lamp load open detectionindicator 371 so as to illuminate the same. By the way, a variable nameof the output signal on its control program which will be describedlater is given by “oStopOpen”.

Bit 3-4 of BCMOUT (o-3-4) in CPU 200 is connected to a gate terminal ofFET switch circuit (FET SW) 341 in output circuit 206. FET switchcircuit 341 is connected to power supply circuit 202 and to an electricload of malfunction indicator (Malfunction Indicator) 372 in indicator104 shown in FIG. 1, which indicates that FIM short-circuit detectionsensor, DDM short-circuit detection sensor, PDM short-circuit detectionsensor or RIM short-circuit detection sensor has detected ashort-circuited condition. Therefore, when an output signal of “H” levelis output from bit 3-4 of BCMOUT (o-3-4), FET switch circuit 341 becomesconductive thereby causing a voltage from power supply circuit 202 to beapplied to malfunction indicator 372 so as to illuminate the same. Bythe way, a variable name of the output signal on its control programwhich will be described later is given by “oMalFunInd”.

Bit 3-3 of BCMOUT (o-3-3) in CPU 200 is connected to a gate terminal ofFET switch circuit (FET SW) 342 in output circuit 206. FET switchcircuit 342 is connected to power supply circuit 202 and to an electricload of day-time light indicator (DRL Indicator) 373 in indicator 104shown in FIG. 1, which indicates a status of the head lamp that it is onduring the day-time. Therefore, when an output signal of “H” level isoutput from bit 3-3 of BCMOUT (o-3-3), FET switch circuit 342 becomesconductive thereby causing a voltage from power supply circuit 202 to beapplied to day-time light indicator 373 so as to illuminate the same.Further, a variable name of the output signal on its control programwhich will be described later is given by “oDRLInd”.

Bit 3-2 of BCMOUT (o-3-2) in CPU 200 is connected to a gate terminal ofFET switch circuit (FET SW) 343 in output circuit 206. FET switchcircuit 343 is connected to power supply circuit 202 and to an electricload of ABS indicator (ABS Indicator) 374 in indicator 104 shown in FIG.1, which indicates that anti-brake lock system (ABS) is in operation.Therefore, when an output signal of “H” level is output from bit 3-2 ofBCMOUT (o-3-2), FET switch circuit 343 becomes conductive therebycausing a voltage from power supply circuit 202 to be applied to ABSindicator 374 so as to illuminate the same. Further, a variable name ofthe output signal on its control program which will be described lateris given by “oABSInd”.

Bit 3-1 of BCMOUT (o-3-1) in CPU 200 is connected to a gate terminal ofFET switch circuit (FET SW) 344 in output circuit 206. FET switchcircuit 344 is connected to power supply circuit 202 and to an electricload of brake warning indicator (Brake warning Indicator) 375 inindicator 104 shown in FIG. 1, which indicates that a parking brake isin operation. Therefore, when an output signal of “H” level is outputfrom bit 3-1 of BCMOUT (o-3-1), FET switch circuit 344 becomesconductive thereby causing a voltage from power supply circuit 202 to beapplied to brake warning indicator 375 so as to illuminate the same. Inaddition, a variable name of the output signal on its control programwhich will be described later is given by “oBrkwarn”.

Bit 0-3 of BCMOUT (o-3-0) in CPU 200 is connected to a gate terminal ofFET switch circuit (FET SW) in output circuit 206. FET switch circuit345 is connected to power supply circuit 202 and to an electrical loadof charge indicator (Charge Indicator) 376 in indicator 104 shown inFIG. 1, which indicates that there is no charging by electric powergeneration from the generator. Therefore, when an output signal of “H”level is output from bit 3-0 of BCMOUT (o-3-0), FET switch circuit 345becomes conductive thereby causing a voltage from power supply circuit202 to be applied to charge indicator 376 so as to illuminate the same.In addition, a variable name of the output signal on its control programwhich will be described later is given by “oCHGInd”.

Bit 4-7 (o-4-7), bit 4-6 (o-4-6) and bit 4-4 (o-4-4) of BCMOUT in CPU200 are connected respectively to a gate terminal of FET switch circuits(FET SW) 346, 347 and 349. FET switch circuits 346, 347 and 349 areconnected respectively between power supply circuit 202 and BAT3, BAT2or BAT1, which are electrical loads other than accessories. Therefore,when an output signal of “H” level is output from bit 4-7 (o-4-7), bit4-6 (o-4-6) and bit 4-4 (o-4-4) of BCMOUT, respectively, FET switchcircuits 346, 347 and 349 become conductive, thereby causing a voltagefrom power supply circuit 202 to be applied to electrical loads BAT3,BAT2 and BAT1, respectively. In addition, variable names of the outputsignals on their control programs which will be described later aregiven by “oVbBAT3”, “oVbBAT2” and “oVbBAT1”, respectively.

Bit 4-5 of BCMOUT (o-4-5) in CPU 200 is connected to a gate terminal ofFET switch circuit (FET SW) 348 in output circuit 206. FET switchcircuit 348 is connected between power supply circuit 202 and anelectrical load of accessory ACC such as a radio or the like. Therefore,when an output signal of “H” level is output from bit 4-5 of BCMOUT(o-4-5), FET switch circuit 348 becomes conductive thereby causing avoltage from power supply circuit 202 to be applied to electrical loadof ACC. Further, a variable name of the output signal on its controlprogram which will be described later is given by “oVbACC”.

Bit 4-3 (o-4-3), bit 4-2 (o-4-2) and bit 4-1 (o-4-1) of BCMOUT in CPU200 are connected respectively to gate terminals of FET switch circuits(FET SW) 350, 351 and 352 in output circuit 206. FET switch circuits350, 351 and 352 are connected between power supply circuit 202 and anelectrical load of ignition coils IGN1, IGN2 or IGN3, respectively.Therefore, when output signals of “H” level are output respectively frombit 4-3 (o-4-3), bit 4-2 (o-4-2) and bit 4-1 (o-4-1) of BCMOUT, FETswitch circuits 350, 351 and 352 become conductive thereby causing avoltage from power supply circuit 202 to be applied to electrical loadsof IGG2, IGN1 and IGN3. Further, variable names of the output signals ontheir control programs which will be described later are given by“oVbIGN2”, “oVbIGN1” and “oVbIGN3”, respectively.

Bit 4-0 of BCMOUT (o-4-0) in CPU 200 is connected to a gate terminal ofFET switch circuit (FET SW) 353 in output circuit 206. FET switchcircuit 353 is connected to power supply circuit 202 and to anelectrical load of shift interlock solenoid (Shift inter-lock solenoid)377 in solenoid 106 shown in FIG. 1, which releases shift-lever lock ofthe automatic transmission. Therefore, when an output signal of “H”level is output from bit 3-0 of BCMOUT (o-3-0), FET switch circuit 353becomes conductive thereby causing a voltage from power supply circuit202 to be applied to shift interlock solenoid 377 so as to release thelock thereof. Further, a variable name of the output signal on itscontrol program which will be described later is given by “oSftItlok”.

By way of example, the voltage to be supplied from power supply circuit202 to respective source terminals of FET switch circuits 330-353 is notnecessarily limited to be the same voltage, but can be varied inaccordance with respective requirements of respective electrical loadsto be connected thereto. In order to meet with such requirements,electric power supply circuit 202 converts the voltage supplied from thebattery via power line PL into a plurality of voltages as required.

Now, with reference to FIGS. 7 and 8, an internal configuration of VCM110, and input means to be connected to a communication IC in VCM 110 aswell as its input signals will be described in the following.

FIG. 7 is a schematic block diagram of a VCM in an electrical powersupply system for an automobile according to one embodiment of theinvention. FIG. 8 is an input bit map diagram at module address “#2” ofthe VCM according to the embodiment of the invention.

Referring to FIG. 7, VCM 110 is comprised of communication IC 210 andelectrical power supply circuit 212. Communication IC 210 is connectedto signal line SL. Communication IC 210 receives data transmittedthrough signal line SL and transmits data input through input means toBCM 100 via signal line SL.

Power supply circuit 212, which is connected to power line PL, convertsthe power supplied from the battery into a predetermined voltage, andsupplies the same to communication IC 210 as its driver voltage.

Now, with reference to FIGS. 7 and 8, a relation between an input signalto be input to an input terminal of communication IC 210 and its inputmeans will be described. As for a particular control method in responseto a particular signal input from a particular input means will bedescribed later with reference to FIG. 21 and subsequent figuresindicating respective function block diagrams and programs of respectivecontrol specifications for respective controls.

As indicated in FIG. 8, input/output terminals specified at address “#2”of VCM have a 32 bit structure, of which a total of 19 bits are usedincluding bits 8-23, bit 26, bit 27 and bit 29.

As indicated in FIG. 7, at bit 29 of communication IC 210, a faultindication signal (MIL indication signal) that indicates a fault in VCM110 itself is input. A variable name of the input signal on its controlprogram which will be described later is given by “iVcmMIL”.

At bit 28 of communication IC 210, an ABS indication signal (ABSindication signal) is input for indicating that ABS is in operation. Avariable name of the input signal on its control program which will bedescribed later is given by “iVcmABS”.

At bit 27 of communication IC 210, a brake indication signal (BRAKEindication signal) is input for indicating that the parking brake is atwork. A variable name of the input signal on its control program whichwill be described later is given by “iVcmBrk”.

From bit 23 to bit 16 of communication IC 210, which are connected tovehicle speed detector (VS Det) 701, there are input 8 bit dataindicative of vehicle speeds detected by vehicle speed detector 701.

Further, from bit 15 to bit 8, which are connected to engine revolutiondetector (ER Det) 702, there are input 8 bit data (Engine Revolutiondata) indicative of engine revolutions detected by engine revolutiondetector 702.

Now, with reference to FIGS. 9 and 10, an internal configuration of FIM120, and input and output means to be connected to communication IC inFIM 120 and its input and output signals will be described in thefollowing.

FIG. 9 is a schematic block diagram of an FIM in the power supply systemfor automobile according to one embodiment of the invention. FIG. 10 isan input bit map diagram at module address “#3” of the FIM according tothe embodiment of the invention.

Referring to FIG. 9, FIM 120 is comprised of communication IC 220, powersupply circuit 222, input circuit 224 and output circuit 226.Communication IC 220 is connected to signal line SL. Communication IC220 transmits data input from input means to BCM 100 via signal line SL.Further, communication IC 220 receives data transmitted via signal lineSL to output to its output circuit.

Power supply circuit 222, which is connected to power line PL, convertsthe power supplied from the battery into a predetermined voltage, andsupplies a driver voltage to communication IC 220, a voltage to inputcircuit 224 for receiving input signals, as well as a driver voltage tooutput circuit 226 to drive electrical loads connected thereto.

Input circuit 224 is an interface for each switch and the like which isinput means, and enters each status of each switch and the like intocommunication IC 220 through each input terminal. Further, outputcircuit 226, in response to an output signal output from a correspondingoutput terminal of communication IC 220, drives a corresponding MOSFETwith protection function which is a switching device so as to supply apower from power supply circuit 222 to its electrical load.

Now, referring to FIGS. 9 and 10, a relation between each input signalto enter each input terminal of communication IC 220 and each inputmeans therefor, as well as a relation between each output signal tooutput from each output terminal of communication IC 220 and each outputcircuit associated therewith and its electric load will be described inthe following. By the way, as for a particular control method inresponse to a particular signal input from its associated input meanswill be described later with reference to FIG. 21 and its subsequentfigures indicating function block diagrams and programs of each controlspecification for each control.

As shown in FIG. 10, input/output terminals of FIM specified at address“#3” thereof are comprised of 32 bit structure, of which bit 0 to bit 7,bit 15 and bit 30 are not used.

Referring to FIG. 9, short-circuit sensor (SS) 901 is connected to bit 8of communication IC 220. Short-circuit sensor 901 detects ashort-circuit condition of power line PL between its own module and theother modules. The short-circuit sensor is provided in FIM 120, DDM 130and PDM 160, respectively. Respective short-circuit sensors have theirown territory assigned thereto for detecting a short-circuit location ofpower line PL therein. For example, in the arrangement of FIG. 1,short-circuit sensor 901 of FIM 120 is assigned to detect occurrence ofa short-circuit of power line PL between FIM 120 and DDM 130. Further,the short-circuit sensor of DDM 130 is assigned to detect occurrence ofa short-circuit of power line PL between DDM 130 and PDM 160. Stillfurther, the short-circuit sensor of PDM 160 is assigned to detectoccurrence of a short-circuit of power line PL between PDM 160 and FIM120. As described above, three units of the short-circuit sensors areused to assign a three-divisional coverage area of the power line PL inloop to each of them. Thereby, it is possible to determine in whichlocation of these areas of the power line PL a short-circuit fault hasoccurred. By the way, a variable name of the input signal on its controlprogram which will be described later is given by “xFimSsNG”.

To bit 21 of communication IC 220, an AC generator (ACG) 902 isconnected. When ACG 902 is not generating power, its input signal is “L”level, and when the same is generating power, its input signal is at “H”level. A variable name of the input signal on its control program whichwill be described later is given by “iACG_L”.

To bit 22 of communication IC 220, a diagnosis unit (DIAG 903 fordiagnosing a lamp failure of the automatic transmission is connected.When the lamp is not at failure, its input signal is “L” level, and whenthe lamp indicator fails, its input signal becomes “H” level. By theway, a variable name of the input signal on its control program whichwill be described later is given by “iPosFIdiag”.

To bit 23 of communication IC 220, a diagnosis unit (DIAG) 904 fordiagnosing a lamp failure of the turn signal lamp is connected. When thelamp is not in fault, its input signal is at “L” level, and when thelamp fails to turn on, its input signal becomes “H” level. By the way, avariable name of the input signal on its control program which will bedescribed later is given by “iPTurnPIMdiag”.

To bits 24-27 of communication IC 220, shift position detection means905 for detecting the positions of the shift-lever (PRNDL) of theautomatic transmission is connected. As will be described later, shiftposition detection means 905 outputs four bit data corresponding to eachof the five shift-lever positions of PRNDL. A variable name of the inputsignal on its control program which will be described later is given by“iPNP_4”, iPNP_3, “iPNP_2” and “iPNP_1”, respectively.

To bit 28 of communication IC 220, a signal of shift interlock switch(P/NP(SI)SW(shift interlock)) 906 indicating that the shift lever of theautomatic transmission is locked is input. When switch 906 is off, itsinput signal is set at “H” level by a voltage supplied from power supplycircuit 222 via a resistance in input circuit 224. When switch 906 isturned on, its input signal becomes “L” level. By the way, a variablename of the input signal on its control program which will be describedlater is given by “iPNP_SI”.

To bit 29 of communication IC 220, a signal of lift gate release switch(P/NP(LR)SW (liftgate release) 907 indicating that the lift gate isreleased is input. When switch 907 is off, its input signal is set at“H” level by a voltage supplied from power supply circuit 222 via aresistance in input circuit 222. When switch 907 becomes on, its inputsignal becomes “L” level. By the way, a variable name of the inputsignal on its control program which will be described later is given by“iPNP_LR”.

To bit 31 of communication IC 220, a signal of reverse switch (reverseSW) 908 indicating that the shift lever of the automatic transmission isset at the reverse position is input. When switch 908 is off, its inputsignal is set at “H” level by a voltage supplied from power supplycircuit 222 via a resistance in input circuit 224. When switch 908becomes on, its input signal becomes “L” level. By the way, a variablename of the input signal on its control program which will be describedlater is given by “iPNP_Rvs”.

Now, output signals from output terminals of communication IC 220 andrespective electrical loads to be controlled in response to these outputsignals will be described in the following.

As indicated in FIG. 9, bit 20 in communication IC 220 is connected to agate terminal of FET switch circuit (FET SW) 920 comprising MOSFET withprotection function provided in output circuit 226. A source terminal ofFET switch circuit 920 is applied with a predetermined voltage suppliedfrom power supply circuit 222. Further, a drain terminal of FET switchcircuit 920 is connected to electrical loads of left-turn signal lamps124L, 144L shown in FIG. 1. Thereby, when an output signal of “H” levelis output from bit 20 of communication IC 220, FET switch circuit 920becomes conductive, thereby causing a voltage from power supply circuit222 to be applied to left-turn signal lamps 124L, 144L so as to turn onthe same. By repeating “H” level and “L” level of its output signal,left-turn signal lamps 124L and 144L are caused to turn on and off, orflash. By the way, a variable name of the output signal on its controlprogram which will be described later is given by “oPTurnLHF”.

Here, as a switching element which constitutes output circuit 226 of theinvention, MOSFET with protection function is used. Further, the FETswitch circuit may be comprised by combining a normal MOSFET and aself-recovery type interrupter element, instead of using the MOSFET withprotection function.

Bit 19 of communication IC 220 is connected to a gate terminal of FETswitch circuit (FET SW) 921 in output circuit 226. FET switch circuit921 is connected to power supply circuit 222 and to electrical loads ofright-turn signal lamps 124R and 144R. Therefore, when an output signalof “H” level is output from bit 19 of communication IC 220, FET switchcircuit 921 becomes conductive thereby causing a voltage from powersupply circuit 222 to be applied to right-turn signal lamps 124R and144R consequently illuminating the same. By repeating “H” level and “L”level for the output signal, right-turn signal lamps 124R and 144R arecaused to turn on and off, or flash. By the way, a variable name of theoutput signal on its control program which will be described later isgiven by “oPTurnRHF”.

Bit 18 of communication IC 220 is connected to a gate terminal of FETswitch circuit (FET SW) 922 in output circuit 226. FET switch circuit922 is connected to power supply circuit 922 and to four electricalloads of body-side lamps 123R, 123L and tail lights 144R and 144L shownin FIG. 1. Therefore, when an output signal of “H” level is output frombit 18 of communication IC 220, FET switch circuit 922 becomesconductive thereby causing a voltage from power supply circuit 222 to beapplied to body-side lamps 123R and 123L as well as tail lights 144R and144L consequently illuminating these lamps. By the way, a variable nameof the output signal on its control program which will be describedlater is given by “oPosFIM”.

Bit 17 of communication IC 220 is connected to a gate terminal of FETswitch circuit (FET SW) 923 in output circuit 226. FET switch 923 isconnected to power supply circuit 222 and to electrical loads oflow-beam lamps 122R-L and 122L-L in head lamps 122R and 122L shown inFIG. 1. Therefore, when an output signal of “H” level is output from bit17 of communication IC 220, FET switch circuit 923 becomes conductivethereby causing a voltage from power supply circuit 222 to be applied tolow-beam lamps 122R-L and 122L-L so as to illuminate the same. By theway, a variable name of the output signal on its control program whichwill be described later is given by “oLoBeam”.

Bit 16 of communication IC 220 is connected to a gate terminal of FETswitch circuit (FET SW) 924 in output circuit 226. FET switch circuit924 is connected to power supply circuit 222 and to an electrical loadof motor-126-M in rear washer pump 126 shown in FIG. 1. Therefore, whenan output signal of “H” level is output from bit 16 of communication IC220, FET switch circuit 924 becomes conductive thereby causing a voltagefrom power supply circuit 222 to be applied to motor-126-M so as toactuate the pump. By the way, a variable name of the output signal onits control program which will be described later is given by “oRrWash”.

Bit 14 of communication IC 220 is arranged to output a VBAT outputsignal for indicating that power is on. By the way, a variable name ofthe output signal on its control program which will be described lateris given by “oVBoutFIM”.

Bit 13, bit 11 and bit 10 in communication IC 220 are arranged to outputignition output signals (IGN#3 output signal, IGN#2 output signal andIGN#1 output signal), respectively. By the way, variable names of theseoutput signals on their control programs which will be described laterare given by “oIgn3outFIM”, “oIgn2outFIM” and “oIgn1outFIM”,respectively.

Bit 9 of communication IC 220 is connected to a gate terminal of FETswitch circuit (FET SW) 925 in output circuit 226. FET switch circuit925 is connected to power supply circuit 222 and to electrical loads ofhigh-beam lamps 122R-H and 122L-H in head lamps 122R, 122L shown in FIG.1. Therefore, when an output signal of “H” level is output from bit 9 ofcommunication IC 220, FET switch circuit 925 becomes conductive therebycausing a voltage from power supply circuit 222 to be applied tohigh-beam lamps 122R-H and 122L-H so as to illuminate the same. By theway, a variable name of the output signal on its control program whichwill be described later is given by “oHiBeam”.

Now, with reference to FIGS. 11 and 12, an internal configuration of DDM130 as well as input means, output means connected to communication ICof DDM 130, and their input and output signals will be described in thefollowing.

FIG. 11 is a schematic block diagram of DDM in the electrical powersupply system for automobile according to one embodiment of theinvention. FIG. 12 is an I/O bit map diagram at “#4” of module addressof DDM according to the embodiment of the invention.

In FIG. 11, DDM 130 is comprised of communication IC 230, power supplycircuit 232, input circuit 234, and output circuit 236. Communication IC230 transmits data received from input means to BCM 100 via signal lineSL. Further, communication IC 230 outputs data transmitted via signalline SL to its output circuit.

Power supply circuit 232, which is connected to power line PL, convertspower supplied from the battery into a predetermined voltage forsupplying voltage to drive communication IC 230, as well as forsupplying voltage to input circuit 234 for entry of input signals, andalso for supplying drive voltages to drive electrical loads connected tooutput circuit 236.

Input circuit 234 that is an input interface for respective switches andthe like which are input means enters status of each switch and the likeinto communication IC 230 via each input terminal. Further, in responseto an output signal output from each output terminal of communication IC230, output circuit 236 causes a MOSFET with protection function that isa switching device to operate so as to supply electric power from powersupply circuit 232 to each electrical load associated therewith.

Now, with reference to FIGS. 11 and 12, a relation between an inputsignal to each input terminal of communication IC 230 and input meansassociated therewith, as well as a relation between an output signalfrom each output terminal and its output circuit or its electrical loadwill be described in the following. By way of example, as to a controlmethod in response to the input signal from the input means will bedescribed later with reference to FIG. 21 and its subsequent drawingswhich indicate functional block diagrams and program flowcharts ofcontrol specifications for respective controls.

As shown in FIG. 12, I/O terminals of DDM specified at “#4” address arecomprised of a 32 bit structure, wherein bit 8 and bit 9 are not used.

As shown in FIG. 11, at bit 10 of communication IC 230, short-circuitdetection sensor (SS) 1101 is connected. DDM 130 is assigned to detect ashort-circuit condition of power line PL located in an area between DDM130 and PDM 160. By the way, a variable name of the input signal on itscontrol program which will be described later is given by “xDdmSsNG”.

From bit 12 to bit 17 in communication IC 230, there are connected doormirror switch (Door Mirror) 1102 provided in switch 132 on the driver'sside shown in FIG. 1. Door mirror switch (Door Mirror) 1102 is comprisedof right turn switch (Door mirror right sw) RT for rotating the doormirror in the right direction, left turn switch (Door mirror left sw) LTfor rotating the door mirror in the left direction, down switch (Doormirror down sw) DN for rotating the door mirror in the downwarddirection, up-switch (Door mirror up sw) UP for rotating the door mirrorin the upward direction, left select switch (Door select LH sw) LS forselecting the left-side door mirror out of the left and right side doormirrors, and right side select switch (Door select RH sw) RS forselecting the right-side door mirror.

When right-turn switch RT connected to bit 12 in communication IC 230 isoff, its input signal is at “H” level by a voltage supplied from powersupply circuit 232 via resistance in input circuit 234. When right-turnswitch RT is on, its input signal becomes “L” level. In the same way,when left-turn switch LT connected to bit 13 is off, its input signal isat “H” level, and when it is on, its input signal becomes “L” level.When down switch DN which is connected to bit 14 is off, its inputsignal is at “H” level, and when it is on, its input signal becomes “L”level. When up switch UP connected to bit 15 is off, its input signal isat “H” level, and when it is on, the same becomes “L” level. When leftselect switch LS is off, its input signal is at “H” level, and when itis on, the same becomes “L” level. When right select switch RS connectedto bit 17 is off, its input signal is “H” level, and when it is on, theinput signal becomes “L” level. By the way, variable names of inputsignals on their control programs which will be described later aregiven by “iDmRH, “iDmLH”, “iDmDN”, “iDmUP”, “iDmLHSel” and “iDmRHSel”,respectively.

From bit 18 to bit 25 in communication IC 230, there are connected powerwindow switch (P/W sw) 1103 provided in door switch 132 on the driver'sside shown in FIG. 1. Power window switch (P/W sw) 1103 is comprised ofup switch LP-UP for lifting a driver's side window (LF), down switchLF-DN for descending the driver's side window (LF), up switch RF-UP forlifting window (RF) opposite to the driver, down switch RF-DN fordescending the window (RF) opposite to the driver, up switch LR-UP forlifting window (LR) at the rear left side, down switch LR-DN fordescending the window (LR) at the rear left side, up switch RR-UP forlifting window (RR) at the rear right side, and down switch RR-DN fordescending the window (RR) at the rear right side.

When up switch LP-UP connected to bit 18 of communication IC 230 is off,its input signal is at “H” level by a voltage supplied from power supplycircuit 232 via a resistance in input circuit 234. When up switch LF-UPis switched on, its input signal becomes “L” level. Down switch LF-DNconnected to bit 19, up switch RF-UP connected to bit 20, down switchRF-DN connected to bit 21, up switch LR-UP connected to bit 22, downswitch LR-DN connected to bit 23, up switch RR-UP connected to bit 24,and down switch RR-DN connected to bit 25 do operate in the same way. Bythe way, variable names of input signals on their control programs whichwill be described later are given by “iDrPwFLUp”, “iDrPwFLDn”,“iDrPwFRUp” “iDrPwFRDn”, “iDrPwRLUp”, “iDrPwRLDn”, “iDrPwRRUp”, and“iDrPwRRDn”, respectively.

To bit 26 of communication IC 230, there is connected power windowauto-lock detect switch 1104 for automatically locking the power windowprovided in switch 132 at the driver's side door shown in FIG. 1. Whenauto-lock detect switch 1104 is detecting a lock condition, its inputsignal is at “H” level by a voltage supplied from power supply circuit232 via resistance in input circuit 234. When it is in unlock condition,its input signal becomes “L” level. By the way, a variable name of theinput signal on its control program which will be described later isgiven by “iPwMtLk”.

Bit 27 of communication IC 230 is connected with power window lockswitch 1105 in switch 132 at the driver's side door shown in FIG. 1 formanually locking the power window. When lock switch 1105 is in a lockedstate, its input signal is at “H” level by a voltage supplied from powersupply circuit 232 via a resistance in input circuit 234. When the sameis in an unlock state, its input signal becomes “L” level. By the way, avariable name of the input signal on its control program which will bedescribed later is given by “iPwLkSw”.

Bit 28 and bit 29 of communication IC 230 are connected with doorlock/unlock switch 1106 in switch 132 at the driver's side door shown inFIG. 1 for locking/unlocking all the doors concentrically. When the doorlock switch is in off-state, its input signal is at “H” level by avoltage supplied from power supply circuit 232 via a resistance in inputcircuit 234. When the same is on-state, its input signal becomes “L”level. By the way, a variable name of the input signal on its controlprogram which will be described later is given by “iDrDRCLk”. Further,with the door unlock switch being in off-state, its input signal is at“H” level by a voltage supplied from power supply circuit 232 via aresistance in input circuit 234. When in on-state, its input signalbecomes “L” level. A variable name of the input signal on its controlprogram which will be described later is given by “iDrDRCUlk”.

Bit 30 of communication IC 230 is connected with door handle switch 1107in switch 132 at the driver's side door shown in FIG. 1 for indicating astate of operation of the door handle. With door handle switch 1107 in apulled state, its input signal is at “H” level by a voltage suppliedfrom power supply circuit 232 via a resistance in input circuit 234.When the door handle is returned to its initial state, its input signalbecomes “L” level. A variable name of the input signal on its controlprogram which will be described later is given by “iDrDRHdl”.

Bit 31 of communication IC 230 is connected with door lock detectionswitch 1108 in switch 132 at the driver's side door shown in FIG. 1 fordetecting a door's lock state. With door lock detection switch 1108 in alocked state, its input signal is set at “H” level by a voltage suppliedfrom power supply circuit 232 via a resistance in input circuit 234.With the same in unlocked state, its input signal becomes “L” level. Avariable name of the input signal on its control program which will bedescribed later is given by “iDrDRDlk”.

In the next, output signals to be output from output terminals ofcommunication IC 230 and electrical loads to be controlled in responseto these output signals will be described in the following.

With reference to FIG. 11, bit 11 of communication IC 230 is connectedto a gate terminal of FET switch circuit (FET SW) 1110 which iscomprised of MOSFET with protection function provided in output circuit236. A source terminal of FET switch circuit 1110 is applied with apredetermined voltage from power supply circuit 232. Further, a drainterminal of FET switch circuit 1110 is connected to switch illuminationlamp 1120 in lamp 136 shown in FIG. 1 at the driver's side door.Therefore, when an output signal of “H” level is output from bit 11 ofcommunication IC 230, FET switch circuit 1110 becomes conductive,thereby applying a voltage from power supply circuit 222 to switchillumination lamp 1120 so as to illuminate the same. By the way, avariable name of the output signal on its control program which will bedescribed later is given by “oDRSwILm”.

Here, as switching devices that constitute output circuit 236, MOSFETswith protection function are used. However, it is not limited thereto,and the FET switch circuit of the invention can be also constructed bycombining conventional MOSFETs and self-recovery type interruptingdevices, instead of using the MOSFETs with protection function.

Bit 7 and bit 6 of communication IC 230 are connected to H-Bridgecircuit (H-BD) 1111 in output circuit 236. H-Bridge circuit 1111 iscomprised of four FET switch circuits (FET SW) 1111A, 1111B, 1111C and1111D, each of which is comprised of MOSFET with protection function.

Bit 7 of communication IC 230 is connected to gate terminals of FETswitch circuit 1111A and 1111B. Bit 6 of communication IC 230 isconnected to gate terminals of FET switch circuits 1111C and 1111D.Source terminals of FET switch circuits 1111A and 1111D are connected topower supply circuit 232. A drain terminal of FET switch circuit 1111Aand a source terminal of FET switch circuit 1111C are connected toX-terminal of motor 1121. Drain terminals of FET switch circuit 1111Band 1111C are grounded. A source terminal of FET switch circuit 1111Band a drain terminal of FET switch circuit 1111D are connected toY-terminal of motor 1121.

When an output signal from bit 7 of communication IC 230 becomes “H”level, FET switch circuits 1111A and 1111B become conductive therebyconducting a current in forward direction in motor 1121 so as to rotatethe motor in a normal direction. Further, when an output from bit 6 ofcommunication IC 230 becomes “H” level, FET switch circuits 1111C and1111D become conductive thereby conducting a current in reversedirection in motor 1121 so as to rotate the motor in a reversedirection.

Here, motor 1121 which is an electrical load refers to a door lock motorin motor 134 shown in FIG. 1. Namely, when the output from bit 7 ofcommunication IC 230 becomes “H” level, H-Bridge circuit 1111 causesdoor lock motor 1121 to rotate in the normal direction so as to unlockthe doors. Further, when the output from bit 6 of communication IC 230becomes “H” level, H-Bridge circuit 1111 causes door lock motor 1121 torotate in the normal direction so as to lock the doors. By the way,variable names of output signals on their control programs which will bedescribed later are given by “oDRRLk_1” and “oDRRLk_2”, respectively.

By way of example, H-Bridge circuit to be described in the following iscomprised of four FET switch circuits each comprised of MOSFET withprotection function as the H-Bridge circuit 1111 described above, andhas the same function therewith to rotate the motor in the normal andreverse directions in response to the two input signals described above.

Bit 5 and bit 4 of communication IC 230 are connected to H-Bridgecircuit (H-BD) 1112 in output circuit 236. H-Bridge circuit 1112 isconnected to power supply circuit 232 and to an electric load of powerwindow motor 1122 in motor 134 shown in FIG. 1. Therefore, when anoutput from bit 5 of communication IC 230 becomes “H” level, powerwindow motor 1122 is caused to rotate in the normal direction so as tolift the window at the driver's side. Further, when an output from bit 4of communication IC 230 becomes “H” level, the power window motor 1122is caused to rotate in the reverse direction so as to descend the windowat the driver's side. By the way, variable names of output signals oncontrol programs which will be described later are given by “oPwDR-1”and “oPwDR-2”, respectively.

Bit 3 and bit 2 of communication IC 230 are connected to H-Bridgecircuit (H-BD) 1113 in output circuit 236. H-Bridge circuit 1113 isconnected to power supply circuit 232 and to an electrical load of doormirror L/R rotation motor 1123 in motor 134 at the driver's side shownin FIG. 1. Therefore, when an output from bit 3 of communication IC 230becomes “H” level, door mirror L/R rotation motor 1123 is caused torotate in the normal direction so as to rotate the door mirror in theright-hand direction. Further, when an output from bit 2 incommunication IC 230 becomes “H” level, the door mirror L/R rotationmotor 1123 is caused to rotate in the reverse direction so as to rotatethe door mirror in the left-hand direction. By the way, variable namesof these output signals on their control programs which will bedescribed later are given by “oLHMirRLH-1” and “oLHMirRLH-2”.

Bit 1 and bit 0 of communication IC 230 are connected to H-Bridgecircuit (H-BD) 1114 in output circuit 236. The H-Bridge circuit 1114 isconnected to power supply circuit 232 and to an electrical load of doormirror up/down rotation motor 1124 in motor 134 shown in FIG. 1 at thedriver's side. Therefore, when an output from bit 1 of communication IC230 becomes “H” level, the door mirror up/down rotation motor 1124 iscaused to rotate in the normal direction so as to rotate the door mirrorin the upper direction. Further, when an output from bit 0 ofcommunication IC 230 becomes “H” level, the door mirror up/down rotationmotor 1124 is caused to reverse so as to rotate the door mirror in thedownward direction. By the way, variable names of these output signalson their control programs which will be described later are given by“oLHMirUD-1” and “oLHMirUD-2”, respectively.

Now, with reference to FIGS. 13 and 14, an internal arrangement of RIM140, input means and output means to be connected to communication IC ofRIM 140, as well as their input signals and output signals will bedescribed in the following.

FIG. 13 is a schematic block diagram of RIM in the power supply systemfor automobile according to one embodiment of the invention. FIG. 14 isan I/O bit map diagram at module address “#5” of RIM according to thisembodiment of the invention.

In FIG. 13, RIM 140 of the invention is comprised of communication IC240, power supply circuit 242, input circuit 244, and output circuit246. Communication IC 240 transmits data received from input means toBCM 100 via signal line SL. Further, communication IC 240 outputs datatransmitted thereto through signal line SL to the output circuit.

Power supply circuit 242 which is connected to power line PL convertspower supplied from the battery into a predetermined voltage so as tosupply a driver voltage to communication IC 240, an input signal entryvoltage to input circuit 244 and a drive voltage to output circuit 246for actuating electrical loads connected therewith.

Input circuit 244 which is an input interface provided for input meanssuch as various switches and the like enters each state of each switchand the like into communication IC 240 via each input terminal. Further,in response to an output signal output from each output terminal ofcommunication IC 240, output circuit 246 enables a MOSFET withprotection function which is a switching device associated therewith tooperate so as to supply power from power supply circuit 242 to anelectrical load associated therewith.

Now, in reference to FIGS. 13 and 14, a relation between each signal toenter each input terminal of communication IC 240 and each input meanstherefor, as well as a relation between each output signal from eachoutput terminal therein and each output circuit and/or each electricalload associated therewith will be described in the following. By theway, as to a control method on the basis of an input signal from eachinput means will be described later with reference to FIG. 21 and itssubsequent figures wherein function block diagrams of respective controlspecifications for respective controls and their program flowcharts areshown.

As shown in FIG. 14, I/O terminals of RIM specified at address “#5” aremade up of 32 bits, wherein bit 0, bit 3 and bit 20 are not used.

As shown in FIG. 13, at bit 21 of communication IC 240, there enters asignal of rear door switch 1301 and 1302 in left/right door switch 141Rand 141L shown in FIG. 1 for the left and right side doors at thepassenger's rear seats. When both switches 1301 and 1302 are off-state,its input signal is set at “H” level by a voltage supplied from powersupply circuit 242 via a resistance in input circuit 244. When either ofswitches 1301 and 1302 becomes on-state, its input signal becomes “L”level. By the way, a variable name of the input signal on its controlprogram which will be described later is given by “iRearJamb”.

At bit 22 of communication IC 240, there is connected diagnosis unit(DIAG) 1303 for diagnosing lamp failure of rear right side turn/stoplamp 143R shown in FIG. 1. When there is no lamp failure, its inputsignal is set at “L” level, and when there occurs a lamp failure, itsinput signal becomes “H” level. By the way, a variable name of the inputsignal on its control program which will be described later is given by“iRRTurnSTPdiag”.

At bit 23 of communication IC 240, there is connected diagnosis unit(DIAG) 1304 for diagnosing a lamp failure of rear left-side turn/stoplamp 143L shown in FIG. 1. When there is no lamp failure, its inputsignal is set at “L” level, and when there occurs a lamp failure, itssignal becomes “H” level. By the way, a variable name of the inputsignal on its control program which will be described later is given by“iRLTurnSTPdiag”.

At bit 24 and bit 25 of communication IC 240, there are entered a signalof power window's up/down switch (P/W RR DOWN SW; P/2 RR UP SW) 1305 inswitch 141R shown in FIG. 1 at the right side of the rear seat. Whenswitch 1305 is switched to the down side (DN), an input signal to bit 24becomes “H” level by a voltage supplied from power supply circuit 242via a resistance in input circuit 244. Further, when switch 1305 isswitched to the up (UP) side, an input signal to bit 25 becomes “H”level. By the way, variable names of these input signals on theircontrol programs which will be described later are given by “iPwRRDn”and “iPwRRUp”, respectively.

At bit 26 and bit 27 of communication IC 240, there are entered a signalof power window's up and down switch (P/2 RL DOWN SW; P/2 RL UP SW) 1306in switch 141L shown in FIG. 1 at rear seat left side. When switch 1306is switched to the down (DN) side, an input signal to bit 26 becomes “H”level by a voltage supplied from power supply circuit 242 via aresistance in input circuit 244. Further, when switch 1306 is switchedto the up (UP) direction, an input signal to bit 27 becomes “H” level.By the way, variable names of input signals on their control programswhich will be described later are given by “iPwRLDn” and “iPwRLUp”,respectively.

At bit 28 to bit 30 of communication IC 240, there are input a signal ofend gate lock/unlock and release switch 1307 in switch 141 shown in FIG.1 in the rear side of the body. When the lock/unlock switch in switch1307 is switched to the unlock (ULK) side, an input signal to bit 28becomes “H” level by a voltage supplied from power supply circuit 242via a resistance in input circuit 244. Further, when the same isswitched to the lock (LK) side, an input signal to bit 29 becomes “H”level. Still further, when the release switch in switch 1307 becomeson-state, an input signal to bit 30 becomes “H” level. By the way,variable names of these input signals on their control programs whichwill be described later are given by “iGateULKSw”, “iGateLKSw” and“iGateReLease”, respectively.

At bit 31 of communication IC 240, there is entered a signal of end gatedoor switch 1308 in switch 141 shown in FIG. 1 at the rear side of thebody for indicating an open/close state of the end gate door. In theclose state of the end gate door, switch 1308 is off-state, and an inputsignal to bit 31 becomes “H” level by a voltage supplied through aresistance in input circuit 244 from power supply circuit 242. Further,when the end gate is opened, an input signal to bit 31 becomes “L”level. By the way, a variable name of the input signal on its controlprogram which will be described later is given by “iGateJaambSw”.

In the next, outputs signals to be output from output terminals ofcommunication IC 240 and electrical loads to be controlled in responseto these output signals will be described in the following.

As shown in FIG. 13, bit 19 of communication IC 240 is connected to agate terminal of FET switch circuit (FET SW) 1330 comprising a MOSFETwith protection function in output circuit 246. FET switch circuit 1330is connected between power supply circuit 242 and rear wiper controller1330. When an output signal of “H” level is output from bit 19 ofcommunication IC 240, FET switch circuit 1310 becomes conductive therebycausing a voltage from power supply circuit 242 to be applied to rearwiper controller 1330, thereby supplying the voltage across anelectrical load of rear wiper motor 1331 in motor 142 shown in FIG. 1.

Further, an output signal from bit 18 of communication IC 240 is inputto rear wiper controller 1330 so as to control the operation of rearwiper motor 1331. That is, the rear wiper is controlled to operatecontinuously, intermittently or the like. Variable names of the outputsignal on its control program which will be described later are given by“oRrWipPwr” and “oRrWipCt1”, respectively.

Here, as switching devices that constitute the output circuit 246 of theinvention, MOSFETs with protection function are used. Further, it is notlimited thereto, and the FET switch circuit of the invention can beconstructed by combining conventional MOSFETs and self-recovery typeinterrupting devices within the scope of the invention.

Bit 17 of communication IC 240 outputs a signal to the rear wiperwasher. By the way, a variable name of the output signal on its controlprogram which will be described later is given by “oRrWipWash”.

Bit 16 of communication IC 240 is connected to a gate terminal of FETswitch circuit (FET SW) 1311 in output circuit 246. FET switch circuit1311 is connected between power supply circuit 242 and an electricalload of solenoid 147 shown in FIG. 1 for releasing the end gate. When anoutput signal of “H” level is output from bit 16 of communication IC240, FET switch circuit 1311 becomes conductive, thereby supplying avoltage from power supply circuit 242 to solenoid 147, and therebyreleasing the end gate. By the way, a variable name of the output signalon its control program which well be described later is given by“oGateOpen”.

Bit 15 of communication IC 240 is connected to a gate terminal of FETswitch circuit (FET SW) 1312 in output circuit 246. FET switch circuit1312 is connected between power supply circuit 242 and an electricalload of left-side turn/stop lamp 143L shown in FIG. 1. When an outputsignal of “H” level is output from bit 15 of communication IC 240, FETswitch circuit 1212 becomes conductive thereby causing a voltage frompower supply circuit 242 to be supplied to turn/stop lamp 143L so as toilluminate the same. By the way, a variable name of the output signal onits control program which will be described later is given by“oTurnStpLHR”.

Bit 14 of communication IC 240 is connected to a gate terminal of FETswitch circuit (FET SW) 1313 provided in output circuit 246. FET switchcircuit 1313 is connected between power supply circuit 242 and anelectrical load of right-side turn/stop lamp 143R shown in FIG. 1. Whenan output signal of “H” level is output from bit 14 of communication IC240, FET switch circuit 1313 becomes conductive thereby allowing avoltage from power supply circuit 242 to be supplied to turn/stop lamp143R so as illuminate the same. By the way, a variable name of theoutput signal on its control program which will be described later isgiven by “oTurnStpRHR”.

Bit 13 of communication IC 240 is connected to a gate terminal of FETswitch circuit (FET SW) 1314 in output circuit 246. FET switch circuit1314 is connected between power supply circuit 242 and an electricalload of center stop lamp (high-mount lamp) 145 shown in FIG. 1. When anoutput signal of “H” level is output from bit 13 of communication IC240, FET switch circuit 1314 becomes conductive, thereby allowing avoltage from power supply circuit 242 to be supplied to center stop lamp145 so as to illuminate the same. By the way, a variable name of theoutput signal on its control program which will be described later isgiven by “OHiMountSTP”.

Bit 12 of communication IC 240 is connected to a gate terminal of FETswitch circuit (FET SW) 1315 provided in output circuit 246. FET switchcircuit 1315 is connected between power supply circuit 242 and anelectrical load of tail lights 144R, 144L shown in FIG. 1. When anoutput signal of “H” level is output from bit 12 of communication IC240, FET switch circuit 1315 becomes conductive, thereby allowing avoltage from power supply circuit 242 to be supplied to tail lights144R, 144L so as to illuminate the same. A variable name of the outputsignal on its control program which will be described later is given by“oPosRIM”.

Bit 11 and bit 10 of communication IC 240 are connected to H-Bridgecircuit (H-BD) 1316 provided in output circuit 246. H-Bridge circuit1316 is connected to power supply circuit 242 and to an electrical loadof right-side power window motor 1332 in motor 142 shown in FIG. 1 atthe rear seat on the right side. Therefore, when an output from bit 11of communication IC 240 becomes “H” level, power window motor 1332 iscaused to rotate in the normal direction so as to lift the rear windowon the right side. Further, when an output from bit 10 of communicationIC 240 becomes “H” level, the power window motor 1332 is caused torotate in the reverse direction so as to descend the rear window on theright-side. By the way, variable names of output signals on theircontrol programs which will be described later are given by “oPwPR-1”and “oPwRR-2”, respectively.

Bit 9 and bit 8 of communication IC 240 are connected to H-Bridgecircuit (H-BD) 1317 provided in output circuit 246. H-Bridge circuit1317 is connected to power supply circuit 242 and to an electrical loadof left-side power window motor 1333 in motor 142 shown in FIG. 1 at therear seat on the left side. Therefore, when an output signal from bit 9of communication IC 240 becomes “H” level, power window motor 1333 iscaused to rotate in the normal direction so as to lift the rear windowon the left side. Further, when an output signal from bit 8 ofcommunication IC 240 becomes “H” level, the power window motor 1333 iscaused to rotate in the reverse direction so as to descend the rearwindow on the left side. By the way, variable names of their outputsignals on their control programs which will be described later aregiven by “oPwRL-1” and “oPwRL-2”, respectively.

Bit 7 and bit 6 of communication IC 240 are connected to H-Bridgecircuit (H-BD) 1318 provided in output circuit 246. H-Bridge circuit1318 is connected to power supply circuit 242 and to an electrical loadof rear door lock motors 1334, 1336 in motor 142 shown in FIG. 1 forlocking left and right-side rear seat doors. Therefore, when an outputfrom bit 7 of communication IC 240 becomes “H” level, the rear door lockmotors 1334, 1335 are caused to rotate in the normal direction so as tolock the left and right-side rear doors. Further, when an output frombit 6 of communication IC 240 becomes “H”, level, the rear door lockmotors 1334, 1335 are caused to rotate in the reverse direction so as tounlock the left and right-side rear seat doors. By the way, variablenames of these output signals on their control programs which will bedescribed later are given by “oRrDrLkMt-1” and “oRrDrLkMt-2”,respectively.

Bit 5 of communication IC 240 is connected to a gate terminal of FETswitch circuit (FET SW) 1319 in output circuit 246. FET switch circuit1319 is connected between power supply circuit 242 and an electricalload of heater 148 for use of the rear defogger shown in FIG. 1. When anoutput signal of “H” level is output from bit 5 in communication IC 240,FET switch circuit 1319 becomes conductive thereby causing a voltagefrom power supply circuit 242 to be supplied to heater 148 so as to heatthe same. By the way, a variable name of the output signal on itscontrol program which will be described later is given by “oDeffog”.

Bit 4 of communication IC 240 is connected to a gate terminal of FETswitch circuit (FET SW) 1320 provided in output circuit 246. FET switchcircuit 1320 is connected between power supply circuit 242 and anelectrical load of back-up lamp 146, namely, two sets of back-up lamps146A and 146B installed at the rear end of the car as shown in FIG. 1.When an output signal of “H” level is output from bit 4 of communicationIC 240, FET switch circuit 1320 becomes conductive, thereby causing avoltage from power supply circuit 242 to be supplied to back-up lamps146A and 146B so as to illuminate the same two. By the way, a variablename of the output signal on its control program which will be describedlater is given by “oBackLamp”.

Bit 2 of communication IC 240 is connected to a gate terminal of FETswitch circuit (FET SW) 1321 provided in output circuit 246. FET switchcircuit 1321 is connected between power supply circuit 242 and anelectrical load of rear dome lamp 149 shown in FIG. 1. When an outputsignal of “H” level is output from bit 2 of communication IC 240, FETswitch circuit 1321 becomes conductive thereby causing a voltage frompower supply circuit 242 to be supplied to rear dome lamp 149 so as toilluminate the same. By the way, a variable name of the output signal onits control program which will be described later is given by “oRrDome”.

Now, with reference to FIGS. 15 and 16, an internal construction of CCM150 and input means to be connected to communication IC in CCM 150 aswell as their input signals will be described in the following.

FIG. 15 is a schematic block diagram of a CCM in the power supply systemfor automobile according to one embodiment of the invention. FIG. 16 isan input bit map diagram at module address “#6” of CCM according to thisembodiment of the invention.

In FIG. 15, CCM 150 is comprised of communication IC 250 and powersupply circuit 252. Communication IC 250 is connected to signal line SL.Communication IC 250 enters data that is transmitted via signal line SL,and transmits data that is input from input means to BCM 100 via signalline SL.

Power supply circuit 252 is connected to power line PL, and convertspower that is supplied from the battery into a predetermined voltagewhich is supplied as a driver voltage for communication IC 250.

Now, in reference to FIGS. 15 and 16, a relation between an input signalthat is input to an input terminal of communication IC 250 and an inputmeans corresponding thereto will be described in the following. By theway, as to a control method based on an input signal input from theinput means will be described later with reference to FIGS. 21 and itssubsequent drawings wherein functional block diagrams of controlspecifications for respective control methods and program flowcharts areindicated.

As shown in FIG. 16, I/O terminals specified at address “#2” of CCM have32 bit construction, and wherein a total of 5 bits from bit 26 to bit 30are used.

As indicated in FIG. 15, a cruise brake pedal switch signal (CruiseBrake Pedal sw) is output from bit 26 of communication IC 250 to cruisecontroller (Crs Cont) 1501. By the way, a variable name of the outputsignal on its control program which will be described later is given by“iCcmBrkPd1”.

From bit 27 of communication IC 250, a cruise brake lamp switch signal(Cruise Brake Lamp sw) is output to cruise controller (Crs Cont) 1501.By the way, a variable name of the output signal on its control programwhich will be described later is given by “iCcmCrsLmp”.

From bit 28 of bits 28 to 30 of communication IC 250, there is output acruise on/off signal (Cruise on/off signal) to cruise controller (CrsCont) 1501, from bit 29 there is output a cruise set signal (CruiseSet/coast signal) to cruise controller (Crs Cont) 1501, and from bit 30there is output a cruise release signal (Cruise Resume/accel signal) tocruise controller (Crs Cont) 1501. By the way, variable names of theseoutput signals on their control programs which will be described laterare given by “iCcmCrsOF”, “iCcmCrsSC”, and “iCcmCrsRA”, respectively.

Now, with reference to FIGS. 17 and 18, an internal construction of PDM160 and input and output means to be connected to communication IC inPDM 160 as well as their input signals and output signals will bedescribed in the following.

FIG. 17 is a schematic block diagram of PDM in the power supply systemfor automobile according to one embodiment of the invention, and FIG. 18is an I/O bit map diagram at module address “#7” of PDM according to thepresent embodiment of the invention.

In FIG. 17, PDM 160 is comprised of communication IC 260, power supplycircuit 262, input circuit 264 and output circuit 266. Communication IC260 thereof is connected to signal line SL. Communication IC 260transmits data that has been entered from the input means to BCM 100 viasignal line SL. Further, communication IC 260 outputs data that has beentransmitted and entered via signal line SL to the output circuitthereof.

Power supply circuit 262 thereof is connected to power line PL, andconverts power supplied from the battery into each predetermined voltagesuitable for driving communication IC 260, enabling input circuit 264 toenter input data, and actuating electrical loads connected to outputcircuit 266.

Input circuit 264 which is an interface for each switch and the likethat are input means, enters each status of each switch or the like viaeach input terminal into communication IC 260. Further, output circuit266 in response to each output signal from each output terminal ofcommunication IC 260 operates each MOSFET with protection function whichis a switching device such that a power from power supply circuit 262 issupplied to each electrical load.

In the next, in reference to FIGS. 17 and 18, a relation between eachinput signal to be entered to each input terminal of communication IC260 and each input means corresponding thereto as well as a relationbetween each output signal to be output from each output terminal andeach output circuit and its related electrical load will be described inthe following. By the way, as to a control method corresponding to aninput signal input from its input means, it will be described later withreference to FIGS. 21 and its subsequent drawings wherein function blockdiagrams of control specification of each control method and its programflowchart are indicated.

As shown in FIG. 18, I/O terminals of PDM specified at address “#7”thereof have 32 bit construction, wherein from bit 0 to bit 14, bit 24and bit 31 are not used.

As indicated in FIG. 17, bit 25 of communication IC 260 is connectedwith short-circuit detection sensor (SS) 1701. Short-circuit detectionsensor 1701 of PDM 160 is assigned to detect a status of short-circuitof power line PL located between PDM 160 and FIM 120. By the way, avariable name of the input signal of its control program which will bedescribed later is given by “xPdmSsNG”.

At bits 26 and 27 of communication IC 260, there are input signals ofpower window up/down switch (P/W FR FOWN SW; P/W FR UP SW) 1702 inswitch 162 shown in FIG. 1 at the opposite side of the driver. Whenswitch 1702 is switched to the side of UP, an input signal to bit 26becomes “H” level by a voltage supplied from power supply circuit 262via a resistance in input circuit 264. Further, when switch 1702 isswitched to the side of down (DN), an input signal to bit 27 becomes “H”level. By the way, variable names of input signals on their controlprograms which will be described later are given by “iPwRRDn” and“iPwRRUp”, respectively.

At bits 28 and 29 of communication IC 260, there are input signals ofdoor lock/unlock switch 1703 in switch 162 shown in FIG. 1 at theopposite side of the driver. When switch 1703 is switched to the lockside (LK), an input signal to bit 28 becomes “H” level by a voltage frompower supply circuit 262 via a resistance in input circuit 264. Further,when switch 1703 is switched to the unlock side (ULK), an input signalto bit 29 becomes “H” level. By the way, variable names of input signalson their control programs which will be described later are given by“iDrASCLK” and “iDrASCULK”, respectively.

Bit 23 and bit 22 of communication IC 260 are connected to H-bridgecircuit (H-BD) 1710 provided in output circuit 266. H-bridge circuit1710 is connected to power supply circuit 262 and to an electrical loadof door lock motor 1720 in motor 164 shown in FIG. 1 at the oppositeside of the driver. Therefore, when an output signal from bit 23 ofcommunication IC 260 becomes “H” level, door lock motor 1720 is causedto rotate in the normal direction so as to lock the doors, and when anoutput signal from bit 22 of communication IC 260 becomes “H” level,door lock motor 1720 is caused to reverse so as to unlock the doors. Bythe way, variable names of output signals on their control programswhich will be described later are given by “oDrASLK-1” and “oDrASLK-2”,respectively.

Bit 21 and bit 20 of communication IC 260 are connected to H-bridgecircuit (H-BD) 1711 in output circuit 266. H-bridge circuit 1711 isconnected to power supply circuit 262 and to an electrical load of powerwindow motor 1721 in motor 164 shown in FIG. 1 at the opposite side ofthe driver. Therefore, when an output signal from bit 21 ofcommunication IC 260 becomes “H” level, power window motor 1721 iscaused to turn in the normal direction so as to lift the window at theopposite side of the driver, further when an output signal from bit 20of communication IC 260 becomes “H” level, power window motor 1721 iscaused to turn in the reverse direction so as to descend the window atthe opposite side of the driver. By the way, variable names of outputsignals on their control programs which will be described later aregiven by “oPwAS-1” and “oPwAS-2”, respectively.

Bit 19 and bit 18 of communication IC 260 are connected to H-bridgecircuit (H-BD) 1712 in output circuit 266. H-bridge circuit 1712 isconnected to power supply circuit 262 and to an electrical load of doormirror right/left rotation motor 1722 in motor 164 shown in FIG. 1installed in the door at the opposite side of the driver. Therefore,when an output from bit 19 of communication IC 260 becomes “H” level,door mirror right/left rotation motor 1722 is caused to rotate in thenormal direction so as to rotate the door mirror in the right-handdirection, and further, when an output signal from bit 18 ofcommunication IC 260 becomes “H” level, door mirror right/left rotationmotor 1722 is caused to rotate in the reverse direction so as to rotatethe door mirror in the left-side direction. By the way, variable namesof output signals on their control programs which will be describedlater are given by “oRHMirRLH-1” and “oRHMirRLH-211, respectively.

Bit 17 and bit 16 of communication IC 260 are connected to H-bridgecircuit (H-BD) 1713 in output circuit 266. H-bridge circuit 1713 isconnected to power supply circuit 262 and to an electric load of doormirror up/down rotation motor 1723 in motor 164 shown in FIG. 1 at theopposite side of the driver. Therefore, when an output from bit 17 ofcommunication IC 260 becomes “H” level, door mirror up/down rotationmotor 1723 is caused to rotate in the normal direction so as to rotatethe door mirror in the upper direction, and further when an output frombit 16 of communication IC 260 becomes “H” level, door mirror up/downrotation motor 1723 is caused to rotate in the reverse direction so asto rotate the door mirror in the downward direction. By the way,variable names of output signals on their control programs which will bedescribed later are given by “oRHMirUD-1” and “oRHMirUD-2”,respectively.

Bit 15 of communication IC 260 is connected to a gate terminal of FETswitch circuit (FET SW) 1713 in output circuit 266. FET switch circuit1713 is connected to power supply circuit 262 and to an electrical loadof switch illumination lamp 1724 in lamp 166 shown in FIG. 1 at the dooropposite to the driver. Therefore, when an output signal of “H” level isoutput from bit 15 of communication IC 260, FET switch circuit 1713becomes conductive, thereby causing a voltage from power supply circuit222 to be applied to switch illumination lamp 1724 so as to illuminatethe same. By the way, a variable name of the output signal on itscontrol program which will be described later is given by “oASSwILm”.

As has been described heretofore, seven units of control modulesdescribed in FIG. 2, including BCM 100, VCM 110, FIM 120, DDM 130, RIM140, CCM 150 and PDM 160 are connected to power line PL provided in aloop form so as to be supplied with power from battery 10. Further, BCM100, VCM 110, FIM 120, DDM 130, RIM 140, CCM 150 and PDM 160 aremutually connected each other via signal line SL provided in a loopform. Further, as described with reference to FIGS. 3 to 18, eachcontrol module thereof has input means such as switches or the like, andelectrical loads which are supplied power from the power supply circuitvia its output circuit that is comprised of FET switch circuit.

Still further, VCM 110, FIM 120, DDM 130, RIM 140, CCM 150 and PDM 160are not provided with a built-in CPU, but is provided with a built-incommunication IC instead thereof. Any input signal entered into controlmodules excepting BCM 100 is controlled by each communication ICbuilt-in each control module and is entered into the CPU within BCM 100via signal line SL. Upon processing the entered signal as required, theCPU transmits the processed signal to each control module via signalline SL such that each electrical load connected to each control moduleis controlled accordingly.

Now, with reference to FIGS. 19 to 85, signal processing to be executedby CPU 200 will be described in the following. The processing isprogrammed in CPU 200 as a program having 31 control tasks.

In the first place, with reference to FIG. 19, control tasks programmedin CPU 200 will be described in the following.

FIG. 19 is a diagram indicating a table of control tasks to be executedin the power supply system for automobile according to one embodiment ofthe invention.

Each control task is defined by a control name and a control functionname on its program, and is further provided with the numbers of inputsignals and output signals. As to the details of each of controlcontents, they will be described later with reference to FIGS. 20 andits subsequent drawings.

At first, with reference to FIGS. 20 and 21, a front turn signal controlat No. 1 in FIG. 19 will be described.

FIG. 20 is a function block diagram indicating a control specificationof the front turn signal control in the power supply system forautomobile according to one embodiment of the invention. FIG. 21 is aprogram flowchart of its control task to be executed by CPU in the powersupply system for automobile according to one embodiment of theinvention. By the way, the control program is described in C language.

Here, in reference to FIG. 20, input/output signals and its controlfunction of the control task concerned will be described in thefollowing. There are five input signals. Ignition SW1 (iLGNswOn-1) is aninput signal to bit 1-6 of CPU 200 in BCM shown in FIG. 3. Ignition SW2(iIGNswOn-2) is an input signal to bit 1-5 of CPU 200 in BCM 100 in FIG.3. Right turn SW (iTmSwRH) is an input signal to bit 1-1 of CPU 200 inBCM 100 in FIG. 3. Left turn SW (iTmSwLH) is an input signal to bit 1-0of CPU 200 in BCM 100 shown in FIG. 3. Option flag (P5, B1) is used foroptional purpose, for example, in such a case of hazard where, insteadof flickering both the right and left turn signals at the same time, itis desired to change the method of its signaling and to turn on and offthe right and left signal lamps alternatively.

As for output signals, there are four output signals. A signal ofP/TLampLHF (oPturnLHF) is an output signal from bit 20 of communicationIC 220 in FIM 120 shown in FIG. 11. LH turn indicator (TmLHInd) is anoutput signal from bit o-1-5 of CPU 200 in BCM 100 shown in FIG. 3. Asignal of P/TLampRHF (oPturnRHF) is an output signal from bit 19 ofcommunication IC 220 in FIM 120 shown in FIG. 11. RH turn indicator(TmRHInd) is an output signal from bit o-1-6 of CPU 200 in BCM 100 inFIG. 3.

Between five inputs and 4 outputs as indicated in FIG. 20, there arelogically connected 6 units of AND circuits, and1-and6; 4 units of ORcircuits, or1-or4; timer circuit (oscillator), time1; inverse circuit,inv1; and switch circuit, tg1.

In the next, using FIG. 21 and in reference to FIG. 20, their controlcontents as a whole will be described.

From lines 2100 to 2105 which are comment statements, there aredescribed a function name, a function, presence of argument or not,presence of a return value or not.

On line 2106, it is defined that its function name“front-rh-turn-signal” has no return value.

From lines 2107 to 2110, definition statements are described defining aninitial value (=1) of q1 and variables to be used in its control task(flug, before, . . . , and 5).

From line 2111 and in its subsequent lines, there are describedexecution statements. On the right-hand side of each execution programand between “/*” and “*/”, there is described a comment statementthereof.

On line 2111, an option flag is read. On line 2112, an output signal(oPturnLHF; oPturnRHF) indicating a status prior to control is read.This is done for the sake of comparison with an output signal aftercontrol to be read and compared on line 2137.

From lines 2113 to 2120, there are defined each logic of 3 AND circuitsof and1-and3, 4 OR circuits of or1-or4, and timer circuit (oscillator)time1. Here, and3 detects a state where both of right-turn SW (iTmSwRH)and left-turn SW (iTmSwLH) become “H” level simultaneously, that is, astate of hazard. Or2 indicates a condition for the right-turn signalindication, and or3 indicates a condition for the left-turn signalindication. Timer1 is a variable which sets a period of flickering ofthe turn signal lamps at 430 ms.

From lines 2121 to 2130, a count value of the timer is updated, itsvalue is checked, after 430 ms, the output of the timer is reversed, andthe timer is reset. By the reversal of the timer output, flickering ofthe lamps at 430 ms cycle is done.

On line 2131, conditions for changing the logic of and6 and switchcircuit tg1 are defined. In line 2132, logic of and5 is defined.

From lines 2133 to 2136, output conditions for the 4 output signals aredefined. Namely, it is specified such that the output of the right turnsignal (oPturnRHF) that causes to flicker the turn signal lamp becomeson-state when and4 is “1”, that the left turn signal output (oPturnLHF)becomes on-state when and5 is “1”, that the right turn signal lamp'soutput (TmRHInd” to be output to its indicator becomes on-state whenand4 is “1”, and that the left turn signal lamp's output (TmLHInd”becomes on-state when and5 is “1”.

From lines 2137 to 2139, an output signal after control is read,compared with the output signal prior to the control which was read atline 2112, and if they do not coincide, namely, when the signal haschanged, FIM data transfer flag is set on. The FIM data transfer flag isalso monitored separately by a flag monitor mechanism of CPU 200 at apredetermined cycle, and when it is detected that the FIM data transferflag is set on, data is transferred to FIM 120.

From lines 2140 to 2143, if or2 and or3 become “0”, namely when theright turn SW (iTmSwRH) and the left turn SW (iTmSw LH) become off-statesimultaneously, the control task for the front turn signal control isreleased, and the processing thereof ends.

As has been described heretofore, in the front turn signal control, itis arranged such that when the ignition SW (iLGNswOn-1 or iIGNswOn-2) ison-state and when the turn SW (iTmSwRH or iTmSwLH) is on-state, thefront side P/TlampHF signal (oPturnLHF or oPturnRHF) is cyclicallyturned on and off so as to flicker front turn signal lamps 123R and 123Las well as the turn indicator (TmLHInd or TmRHInd).

In the next, using FIGS. 22 and 23, the rear turn signal controlindicated on No. 2 line in FIG. 19 will be described.

FIG. 22 is a function block diagram indicating a control specificationfor the rear turn signal control in the power supply system forautomobile according to one embodiment of the invention, and FIG. 23 isa program flowchart of a control task to be executed by CPU of the powersupply system for automobile according to one embodiment of theinvention. By the way, the control program is described in C-language.

Here, using FIG. 22, input and output signals of the present controltask as well as control functions will be described in the following.There are seven input signals. Ignition SW1 (iLGNswOn-1) is a signal tobe input to bit 1-6 of CPU 200 in BCM 100 shown in FIG. 3. Ignition SW2(iLGNswOn-2) is a signal to be input to bit 1-5 of CPU 200 in BCM 100 inFIG. 3. Right turn SW (iTmSwRH) is a signal to be input to bit 1-1 ofCPU 200 in BCM 100 shown in FIG. 3. Left turn SW (iTmSwLH) is a signalto be input to bit 1-0 of CPU 200 in BCM 100 shown in FIG. 3. TCC stopSW (iStopSw) is a signal to be input to bit 1-12 of CPU 200 in BCM 100shown in FIG. 3. Brake SW (iBrkSw) is a signal to be input to bit 1-11of CPU 200 in BCM 100 shown in FIG. 3. Option flag (P5, B1) which isused optionally is used in a case, for example, where the illuminationmethod of the four turn signals is desired to be changed from flickeringthe four turn signals simultaneously to alternatively illuminating theright and left side lamps at the time of hazard.

There are two output signals. An output signal of R/R turn/STOP lamp(oTurnStpRHR) is an output signal from bit 14 of communication IC 240 ofRIM 140 shown in FIG. 13. An output signal of R/L turn/STOP lamp(oTurnStpLHR) is an output signal from bit 14 of communication IC 240 ofRIM 140 shown in FIG. 13.

Between the 7 inputs and the 2 outputs, as shown in FIG. 22, there arelogically connected by four units of AND circuits, and1-and4; five unitsof OR circuits, or1-or5; timer circuit (oscillator) timer 6; inversecircuit inv1; switch circuits sw1, sw2, and tg1.

Based on FIG. 23 and in reference to FIG. 22, the control contents as awhole will be described in the following.

From lines 2300 to 2305, there are described comment statements andwherein a function name, function, whether or not argument is present,and whether or not a return value is given are described.

In line 2306, it is defined that the function name “rear-lh-turn-signal”has no return value.

From lines 2307 to 2311, there are described definition statements fordefining an initial value (=0) of q1, and a variable (flug, or1, . . . ,after) to be used in this control task.

On lines 2312 and its subsequent lines, execution statements aredescribed, wherein a comment statement is described on the right side ofeach execution program and between “/*” and “*/”.

On line 2312, an output signal (oTurnStpRHF) indicating a status priorto control is read. On line 2313, an option program is read.

From lines 2314 to 2321, each logic for three units of AND circuits ofand1-and3 as well as 5 units of OR circuits of or1-or5 is defined. Here,more specifically, and3 detects a state where both the right turn SW(iTmSwRH) and the left turn SW (iTmSwLH) become “H” level, namely, astate of hazard. Or2 indicates a condition for the left turn signalindication. Or5 detects a state of the brake pedal being pressed down.In the present embodiment of the invention, because the rear turn signallamps are arranged to serve also as the stop lamps, in order for thesame to function as the turn signal lamps in precedence to the stoplamps, the state of the brake being pressed down is allowed to bedetected according to the invention.

From lines 2322 to 2333, a count value of the timer is updated, itsvalue is checked, after elapse of 430 ms, the timer output is reversed,and the timer is reset. By the reversal of the timer output, flickeringof the lamps at a cycle of 430 ms is carried out.

On line 2334, a condition for switching over of switch circuit sw1 isspecified. When or2 is “1”, q1 is selected, and when “0”, or5 isselected. Thereby, the rear turn/stop lamp is allowed to operate as theturn signal lamp in precedence to the stop lamp.

On line 2335, logic of and4 as well as a condition for switching overswitch circuit tg1 are specified. From lines 2336 to 2337, the functionof the turn signal lamp is given precedence.

On lines 2338 and 2339, output conditions for the two output signals aredefined. Namely, the output of the right turn signal (oTurnStpRHR) forflickering the turn signal lamps becomes on-state if right-out is “1”.The output of the left turn signal (oTurnStpLHR) becomes on-state ifleft-out is “1”.

From lines 2340 to 2342, an output signal after the control is read, andcompared with the output signal prior to the control which was read atline 2312, and when they are not the same, namely, when the signal haschanged, the FIM data transfer flag is set on.

In lines 2343 to 2345, if or4 is “0”, namely, when both the right turnSW (iTmSwRH) and the left turn SW (iTmSwLH) become off-state, thecontrol task of the rear turn signal control is released and itsprocessing is terminated.

As has been described hereinabove, in the rear turn signal control ofthe invention, when ignition SW (iIGNswOn-1 or iIGNswOn-2) is on-stateand also when turn SW (iTmSwRH or iTmSwLH) is on-state, P/TlampHF signal(oPturnLHF or oPturnRHF) is caused cyclically to turn on and off so asto flicker turn/stop lamps 143R, 143L. Further, in the state where thebrake pedal is pressed down (in the on-state of the TCC stop SW or brakeSW), flickering of the turn signal lamps is given precedence.

Now, with reference to FIGS. 24 and 25, a back-up lamp control at No. 3in FIG. 19 will be described in the following.

FIG. 24 is a function block diagram indicating a control specificationfor the back-up lamp control in the power supply system for automobileaccording to one embodiment of the invention, and FIG. 25 is a programflowchart of a control task to be executed by CPU in the power supplysystem for automobile according to one embodiment of the invention. Bythe way, the control program thereof is described in C-language.

Here, using FIG. 24, input and output signals as well as controlfunctions for the present control task will be described in thefollowing. There are three input signals. Ignition SW1 (iIGNswOn-1) isan input signal to bit 1-6 of CPU 200 in BCM 100 shown in FIG. 3.Ignition SW2 (iIGNswOn-2) is an input signal to bit 1-5 of CPU 200 inBCM 100 shown in FIG. 3. Reverse SW (iPNP-Rvs) is an input signal to bit31 of communication IC 220 in FIM 120 of FIG. 9, and detects a state ofthe shift lever in the automatic transmission when the shift lever isset at the reverse position. A signal of reverse SW (iPNP-Rvs) enteredinto communication IC 220 of FIM 120 is transferred to CPU 200 in BCM100 via communication line CL.

An output signal is a back-up lamp output (oBackLamp), and is outputfrom bit 4 of communication IC 240 in RIM 140 shown in FIG. 13.

As shown in FIG. 24, between the three inputs and the one output, thereare logically connected two units of AND circuits and1, and2; ORcircuits or1; and timer circuit (oscillator) timer 7.

In the following, using FIG. 25 and in reference to FIG. 24, controlcontents as a whole will be described.

In lines 2500 to 2505, there are described comment statements, and afunction name, function, whether or not argument is present, and whetheror not a return value is given are described.

In line 2506, it is defined that the function name “back-up-lamp” has noreturn value.

In lines 2507 to 2510, there are described definition statement definingan initial value (=0) of time-out, and variables (or1, and1, . . . ,after) used in this control task.

In line 2511 and thereafter, there are described execution statements,wherein on the right-hand side of each execution program and between“/*” and “*/”, there is described a comment statement.

In line 2511, an output signal (oBackLamp) in a state prior to thecontrol is read.

In lines 2512 to 2513, each logic of OR circuit or1 and AND circuit and1is defined. Here, in a state where the reverse SW (iPNP_Rvs) is on-stateand also the ignition SW (iIGNswOn-1 or iIGNswOn-2) is on-state, anoutput of and1 becomes “H” level.

In lines 2514 to 2516, a count-up condition for the counter isspecified, a stop condition for the counter is specified, and operationof a mono-stable multi vibrator is defined. In lines 2517 to 2518, anoutput condition for the output signals is defined. Namely, when anoutput of and2 is “1”, it becomes on-state.

In lines 2519 to 2521, an output signal yielded after the control isread and compared with the output signal prior to the control which wasread in line 2512, and when they do not agree with each other, namely,when the signal has changed, RIM data transfer flag is set on.

In lines 2522 to 2527, if and1 becomes “0”, namely, when reverse SW(iPNP-Rvs) becomes off-state, the control task for the back-up lampcontrol is released thereby terminating the processing thereof.

As has been described hereinabove, in the back-up lamp control, whenignition SW (iIGNswOn-1 or iIGNswOn-2) is on-state and also turn SW(iTmSwRH or iTmSwLH) is on-state, if reverse SW (iPNP-Rvs) becomeson-state, the back-up lamp output (oBackLamp) is turned on so as toilluminate back-up lamp 146.

In the next, using FIGS. 26 and 27, the front rear light controlindicated at No. 4 in FIG. 19 will be described.

FIG. 26 is a function block diagram indicating a control specificationfor the front rear light control in the power supply system forautomobile according to one embodiment of the invention, and FIG. 27 isa programming flowchart of the control task to be executed by CPU of thepower supply system for automobile according to the one embodiment ofthe invention. Its control program is written in C-language.

Here, using FIG. 26, input and output signals of this control task andcontrol functions will be described. There are two input signals. Parklamp SW (iPosOn) is an input signal to bit 1-3 of CPU 200 in BCM 100shown in FIG. 3. Starter SW (iIGNswST) is an input signal to bit 1-30 ofCPU 200 in BCM 100 shown in FIG. 3.

There are four output signals. Combination marker lamp output (oPosFIM)is an output signal from bit 18 of communication IC 220 in FIM 120indicated in FIG. 9. Rear combination lamp output (oPosRIM) is an outputsignal from bit 12 of communication IC 240 in RIM 140 shown in FIG. 13.DR door illumination lamp output (oDRSwILm) is an output signal from bit11 of communication IC 230 in DDM 130 indicated in FIG. 11. AS doorillumination lamp output (oASSWILm) is an output signal from bit 15 ofcommunication IC 260 in PDM 160 shown in FIG. 17.

As shown in FIG. 26, AND circuit (and1) logically connects between thetwo inputs and four outputs.

Now, using FIG. 27 and in reference to FIG. 26, control contents thereofwill be described as a whole in the following.

From lines 2700 to 2705, comment statements are given, wherein afunction name, function, if there is argument or not, and if there is areturn value or not are described.

In line 2706, it is defined that the function name “front-rear-light”does not have a return value.

From lines 2707 to 2709, definition statements are given definingvariables (before, after, . . . , and1) to be used in this control task.

In line 2710 and thereafter, execution statements are described, whereinon the right-hand side of each execution program and between “/*” and“*/”, there is described comment statement.

In line 1710, an output signal (oPosFIM) yielded in a state prior to itscontrol is read.

In line 2711, logic of AND circuit (and1) is defined. Here, it is notedthat when park lamp SW (iPosOn) is on-state and also starter SW(iIGNswST) is on-state, an output of and1 becomes “H” level.

From lines 2712 to 2723, output conditions for output signals aredefined. Namely, only when an output of and1 is “1”, combination markerlamp output (oPosFIM), rear combination lamp output (oPosRIM), DR doorillumination lamp output (oDRSwILm) and AS door illumination lamp output(oASSwILm) become on-state, and in other cases, they become off-state.

From lines 2724 to 2729, an output signal after subjecting to thecontrol is read, and is compared with the output signal prior tosubjecting to the control. When they do not coincide with each other,namely, when the signal has changed, FIM, DDM, PDM and RIM data transferflags are set on.

In lines 2730 to 2731, the control task for the front rear light controlis released to end the processing thereof.

As described heretofore, in the front rear light control of theinvention, if park lamp SW (iPosOn) is on-state and also starter SW(iIGNswST) is on-state, combination marker lamp output (oPosFIM), rearcombination lamp output (oPosRIM), DR door illumination lamp output(oDRSwILm) and AS door illumination lamp output (oASSwILm) are set on soas to illuminate side lamps 123R and 123L, tail lights 144R and 144L,door switch illumination lamp 1120 at the side of the driver, and doorswitch illumination lamp 1724 at the opposite side of the driver.

Now, using FIGS. 28 and 29, the head lamp control depicted at No. 5 inFIG. 19 will be described.

FIG. 28 is a function block diagram indicating a control specificationfor head lamp control in the power supply system for automobileaccording to one embodiment of the invention, and FIG. 29 is aprogramming flowchart for the control task to be executed by CPU in thepower supply system for automobile according to the one embodiment ofthe invention. By the way, the control program is described inC-language.

Here, using FIG. 28, input and output signals of this control task, andcontrol functions will be described in the following. There are sixinput signals. Keyless lock SW (iRcLock) is an input signal to bit 2-26of CPU 200 in BCM 100 shown in FIG. 3. Low beam output (oLoBeam) is aninput signal to bit 17 of communication IC 220 in FIM 120 shown in FIG.9. High beam output (oHiBeam) is an input signal to bit 9 ofcommunication IC 220 in FIM 120 shown in FIG. 9. Starter Sw (iIGNswST)is an input signal to bit 1-30 of CPU 200 in BCM 100 in FIG. 3. Highbeam SW (iHiBeamSw) is an input signal to bit 1-29 of CPU 200 in BCM 100in FIG. 3. Head light-on (iLiteOn) is an input signal to bit 1-9 of CPU200 in BCM 100 shown in FIG. 3.

There are three output signals. High beam indicator (oHiBmInd) is anoutput signal from bit o-1-4 of CPU 200 in BCM 100 in FIG. 9. Low beamlamp (oLOBeam) is an output signal from bit 17 of communication IC 220in FIM 120 in FIG. 9. High beam lamp (oHiBeam) is an output signal frombit 9 of communication IC 220 in FIM 120 in FIG. 9. Note here that thelow beam lamp (oLOBeam) and the high beam lamp (oHiBeam) also serve asinput signals in this control.

Between the six inputs and the three outputs, as shown in FIG. 28, thereare logically connected with three AND circuits of and1, and2, and4; twoOR circuits of or1, or2; a mono-stable multi-vibrator timer 17; twoinverter circuits of inv1, inv2; three switch circuits of sw1, . . . ,sw3.

Now, using FIG. 29 and in reference to FIG. 28, control contents thereofwill be described as a whole.

From lines 2900 to 2905, there are given comment statements, wherein afunction name, function, if there is argument or not, and if there is areturn value or not are described.

In line 2906, it is defined that the function name “head-lamp” does nothave a return value.

From lines 2907 to 2910, definition statements are described defininginitial values of and4- and q (=0), and variables (before, after, . . ., flug) to be used in this control task.

In lines 2911 and to follow, execution statements are described, whereincomment statements are given on the right-hand side of each executionprogram and between “/*” and “*/”.

In line 2911, an output signal at a state prior to control (oLOBeam;oHiBeam) is read.

From lines 2912 to 2918, each logic of three AND circuits (and1, and2,and4), two OR circuits (or1, or2) and two inverter circuits (inv1, inv2)is defined. An output of and1 indicates illumination condition of thelow beam lamp, and an output of and2 indicates illumination condition ofthe high beam lamp. The low beam lamp becomes on when starter SW(iIGNswST) is on and head light (iLiteOn) is on, and when high beam SW(iHiBeamSw) is off. The high beam lamp becomes on when starter SW(iLGNswST) is on, head light-on (iLiteOn) is on, and also high beam SW(iHiBeamSw) is on.

From lines 2919 to 2921, output conditions for the two output signalsare defined. Namely, when and1, and2, or1 become “1”, the low beam lamp(oLOBeam), high beam lamp (oHiBeam) and high beam indicator (oHiBmInd)become on-state, respectively.

In lines 2921 to 2929, the counter is operated for 5 seconds, thenreset. The counter is operated as a mono-stable multi-vibrator.

From lines 2930 to 2932, switch-over conditions for switch circuitssw1-sw3 are indicated, wherein after operation of the counter for 5seconds, low-beam lamp (oLOBeam), high-beam lamp (oHiBeam) and high-beamindicator (oHiBmInd) become off-state. Namely, in a condition that thehead lamp is turned on such as the low beam output (oLOBeam) or highbeam output (oHiBeam) is on, that keyless lock SW (iRcLock) becomes on,and that the lock is set up by the remote control, the mono stablevibrator timer 17 causes after 5 second of the lock to turn off the headlamp in order to prevent the head lamp from being forgotten as turnedon.

In line 2933, “and4”, is set in “and4_”. Further, in lines from 2934 to2936, an output signal after the control is read on, compared with theoutput signal before the control, and if they do not agree with eachother, that is, if the signal has changed, FIM data transfer flag is seton.

In lines 2937 to 2939, if q is “0”, the control task of the head lampcontrol is released and the processing thereof is terminated.

As has been described heretofore, in the head lamp control, when starterSW (iIGNswST) is on, head light-on (iLiteOn) is on, and high beam SW(iHiBeamSw) is off, the low beam lamp (oLOBeam) is turned on toilluminate low beam lamps 122R-L, 122L-L. Further, when starter SW(iIGNswST) is on, head light-on (iLiteOn) is on, and high beam SW(iHiBeamSw) is on, the high beam lamp (oHiBeam) is turned on toilluminate high beam lamps 122R-H, 122L-H, and also high beam indicator(oHiBmInd) is turned on to illuminate high beam indicator 363.

Still further, if keyless lock SW (iRcLock) is set on in a conditionthat low beam output (oLOBeam) or high beam output (oHiBeam) is on, thehead lamp is turned off after elapse of 5 seconds.

Now, with reference to FIGS. 30 and 31, intermittent control of the rearwiper indicated at No. 6 in FIG. 19 will be described.

FIG. 30 is a function block diagram indicating a control specificationfor intermittent control of the rear wiper in the power supply systemfor automobile according to one embodiment of the invention, and FIG. 31is a program flowchart of a control task to be executed by CPU in thepower supply system for automobile according to the one embodiment ofthe invention. By the way, its control program is written in C language.

Here, using FIG. 30, input/output signals in this control task andcontrol functions will be described. There are two input signals.Accessory SW (iIGNswAcc) is an input signal to bit 1-4 in CPU 200 in BCM100 shown in FIG. 3. Rear wiper SW (iRrWip) is an input signal to bit1-17 in CPU 200 in BCM 100 in FIG. 3.

An output signal is a rear wiper drive signal (oRrWipCtL), which is asignal output from bit 18 of communication IC 240 in RIM 140 shown inFIG. 13.

Between the two inputs and one output, there are logically connected byAND circuit “and1” as indicated in FIG. 30.

In the next, using FIG. 31 and in reference to FIG. 30, control contentsas a whole will be described in the following.

From lines 3100 to 3105, comment statements are described, wherein afunction name, function, whether an argument is present or not, whethera return value is given or not are indicated.

In line 3106, it is defined that the function name “rear-wiper” does nothave a return value.

In lines 3107 to 3109, definition statements are given definingvariables (before, after, . . . , and1) used in this control task.

In line 3110 and thereafter, execution statements are described, andwherein on the right-hand side of each execution statement and between“/*” and “*/”, a comment statement is described.

In line 3110, an output signal indicating a state before the control(oRrWipCtL)is read.

In line 3111, logic of AND circuit “and1” is defined. Here, in acondition that accessory SW (iIGNswAcc) is on-state and rear wiper SW(iRrWip) is off-state, an output of “and1” becomes “H” level.

In lines 3112 to 3117, output conditions for output signals are defined.That is, if an output of “and1” is “1”, rear wiper drive signal(oRrWipCtL) becomes on, and in other cases the same becomes off.

In lines 3118 to 3120, an output signal after the control is read,compared with the output signal before the control, and if they do notagree with each other, namely, when the output signal has changed, FIMdata transfer flag is set on.

In lines 3121 to 3122, the control task of the rear wiper intermittentcontrol is released, thereby ending the processing thereof.

As described above, in the rear wiper intermittent control, in the statethat the accessory SW (iIGNswAcc) is on-state and rear wiper SW (iRrWip)is off-state, if rear wiper drive signal (oRrWipCtL) becomes on-state,rear wiper motor 1331 is caused via rear wiper controller 1330 tooperate intermittently.

In the next, using FIGS. 32 and 33, the rear wiper washer controlindicated at No. 7 in FIG. 19 will be described in the following.

FIG. 32 is a function block diagram indicating a control specificationof the rear wiper washer control in the power supply system forautomobile according to one embodiment of the invention, and FIG. 33 isa programming flowchart of a control task to be executed by CPU in thepower supply system for automobile according to the one embodiment ofthe invention. By the way, its control program is written in C language.

Here, using FIG. 32, input/output signals in this control task andcontrol functions will be described in the following. There are twoinput signals. Accessory SW (iIGNswAcc) is an input signal to bit 1-4 inCPU 200 in BCM 100 shown in FIG. 3. Rear wiper washer SW (iRrWipWash) isan input signal to bit 1-16 in CPU 200 in BCM 100 in FIG. 3.

There are two output signals. Rear washer signal (rRrWash) is a signaloutput from bit 16 in communication IC 220 in FIM 120 shown in FIG. 9.Rear wiper wash output signal (oRrWipWash) is a signal output from bit17 in communication IC 240 in RIM 140 shown in FIG. 13.

Between the two input and one output, there are logically connected byAND circuit “and1” as indicated in FIG. 32.

In the next, using FIG. 33 and in reference to FIG. 32, control contentsas a whole will be described in the following.

In lines 3300 to 3305, there are described comment statements, wherein afunction name, function, if there is an argument or not, and if there isa return value or not are described.

In lines 3307 to 3309, definition statements are given definingvariables (before, after, and1) used in this control task.

From line 3310 and thereafter, execution statements are described,wherein on the right-hand side of each execution statement and between“/*” and “*/”, a comment statement is given.

In line 3310, an output signal indicating a state before the control(oRrWipWash) is read.

In line 3311, logic of AND circuit “and1” is defined. Here, in a statewhere accessory SW (iIGNswAcc) is on-state and rear wiper washer SW(iRrwipwash) is off-state, an output of “and1” becomes “H” level.

In lines 3312 to 3319, output conditions for output signals are defined.Namely, when the output of “and1” is “1”, rear washer signal (oRrWash)and rear wiper wash output signal (oRrWipWash) become on, and in othercases they become off.

In lines 3320 to 3324, an output signal after the control is read,compared with the output signal before the control, and if they do notagree with each other, that is, if the signal has changed, RIM and FIMdata transfer flags are set up.

In line 3325, the control task of the rear wiper washer control isreleased to end the processing thereof.

As described above, in the rear wiper washer control, in the state whereaccessory SW (iIGNswAcc) is on and rear wiper washer SW (iRrWipWash) isoff-state, the rear washer signal (oRrWash) and rear wiper wash outputsignal (oRrWipWash) become on to operate the rear wiper washer.

In the next, using FIGS. 34 and 35, the rear defogger control indicatedat No. 8 in FIG. 19 will be described in the following.

FIG. 34 is a function block diagram indicating a control specificationof the rear defogger control in the power supply system for automobileaccording to one embodiment of the invention, and FIG. 35 is aprogramming flowchart of a control task to be executed in CPU in thepower supply system for automobile according to the one embodiment ofthe invention. By the way, its control program is written in C language.

Here, using FIG. 34, input/output signals in this control task andcontrol functions will be described. There are three input signals.Ignition SW1 (iIGNswOn-1) is a signal to be input to bit 1-6 in CPU 200in BCM 100 shown in FIG. 3. Ignition SW2 (iIGNswOn-2) is a signal to beinput to bit 1-5 in CPU 200 in BCM 100 shown in FIG. 3. Rear defogger SW(iDefog) is a signal to be input to bit 1-18 in CPU 200 in BCM 100 inFIG. 3.

There are two output signals. Rear defogger output (oDeffog) is a signaloutput from bit 5 of communication IC 240 in RIM 140 shown in FIG. 13.Rear defogger indicator (oDefogInd) is a signal output from bit o-1-7 ofCPU 200 in BCM 100 in FIG. 3.

Between the three inputs and the two outputs, there are logicallyinterconnected by two AND circuits (and1 and and2), an OR circuit (or1),an inverting circuit (inv1), and a mono stable multi vibrator (Dtimer).

In the next, using FIG. 35 and in reference to FIG. 34, control contentsas a whole will be described in the following.

In lines 3500 to 3505, comment statements are given, wherein a functionname, functions, if there is an argument or not, and if there is areturn value or not are indicated.

In line 3506, it is defined that the function name “rear-defog” has noreturn value.

In lines 3507 to 3510, definition statements are described defining aninitial value of q to be 0, and variables (inv1. Or1, . . . , after) tobe used in the control task.

In lines 3511 and thereafter, execution statements are described,wherein on the right-hand side of each execution statement and between“/*” and “*/”, each comment statement is given.

In line 3511, an output signal representing the state prior to thecontrol (oDeffog) is read.

In lines 3512 to 3514, each logic of inverting circuit (inv1), ORcircuit (or1) and AND circuit (and1) is defined. Here, in a state thatthe rear defogger SW (iDefog) is off, and ignition SW (iIGNswOn-1 oriIGNswOn-2) is on-state, an output signal of and1 becomes “H” level.

In lines 3515 to 3521, a count-up condition and a stop condition for thecounter are defined so as to specify the operation of the mono stablemulti vibrator. The mono stable multi vibrator is allowed to operate forten minutes normally. Further, in lines 3522 to 3525, operation of theAND circuit and2 is specified to execute a forced reset operation.Namely, if an on-signal is input in repetition from rear defogger SW(iDefog) in a very short period of time, i.e., while the Dtimer counts 5pulses of count, the Dtimer is forcibly reset.

In lines 3522 to 3529, it is defined that in case the or1 becomes off,that is, ignition SW (iIGNswOn-1 and iIGNswOn-2) become off, Dtimer andq are reset to “0” so as to interrupt current conduction in thedefogger.

In lines 3531 and 3532, an output condition for output signals isdefined. Namely, when the output of q is “1”, rear defogger output(oDeffog) and rear defogger indicator (oDefogInd) become on.

In lines 3533 to 3535, an output signal after the control is read,compared with the output signal before the control, and if they do notagree with each other, that is, if the signal has changed, RIM datatransfer flag is set on.

In lines 3536 to 3539, if q becomes “0”, the control task of the reardefogger control is released thereby ending the processing thereof.

As described above, in the rear defogger control, in the state that theignition SW (iIGNswOn-1 or iIGNswOn-2) is on, and the rear defogger SW(iDefog) is on-state, the rear defogger output (oDeffog) and reardefogger indicator (oDefogInd) are made on-state so as to flow a currentin heater 148 for the rear defogger, and to illuminate defoggerindicator (Defogger Indicator) 360.

In the next, using FIGS. 36 to 38, the rear defogger control indicatedat No. 9 in FIG. 19 will be described in the following.

FIG. 36 is a functional block diagram indicating a control specificationof the rear defogger control in the power supply system for automobileaccording to one embodiment of the invention, and FIGS. 37 and 38 areprogramming flowcharts of the control task to be executed in CPU in thepower supply system for automobile according to the one embodiment ofthe invention. By the way, its control program is written in C language.

Here, using FIG. 36, input/output signals in this control task andcontrol functions will be described in the following. There are nineinput signals. Door lock SW (iDrASClk) is a signal to be input to bit 28in communication IC 260 in PDM 160 shown in FIG. 17. Door lock detectionSW (iDrDRClk) is a signal to be input to bit 28 in communication IC 239in DDM 130 shown in FIG. 11. Keyless door lock SW (iRcLock) is a signalto be input to bit 2-26 in CPU 200 in BCM 100 shown in FIG. 3. End gatelock SW (iGateLKSw) is a signal to be input to bit 29 in communicationIC 240 in RIM 140 shown in FIG. 13. Keyless DR unlock SW (iRcDrUnlk) isa signal to be input to bit 2-27 in CPU 200 in BCM 100 in FIG. 3. Doorunlock detection SW (iRrDRUlk) is a signal to be input to bit 29 incommunication IC 230 in DDM 130 in FIG. 11. Door unlock SW (iDrASUlk) isa signal to be input to bit 29 in communication IC 260 in PDM 160 inFIG. 17. End gate unlock SW (iGateULKSw) is a signal to be input to bit28 in communication IC 240 in RIM 140 in FIG. 13. Keyless unlock SW(iRcUnlock) is a signal to be input to bit 2-25 of CPU 200 in BCM 100 inFIG. 3.

There are six output signals. AS door lock output (oDrASLk-2) is asignal output from bit 22 of communication IC 260 in PDM 160 shown inFIG. 17. Rear door lock output (oRrDrLkMt-2) is a signal output from bit6 of communication IC 240 in RIM 140 shown in FIG. 13. Door unlockoutput (oDrDRLk-1) is a signal output from bit 7 of communication IC 230in DDM 130 shown in FIG. 11. AS door unlock output (oDrASLk-1) is asignal output from bit 23 of communication IC 260 in PDM 160 shown inFIG. 17. Rear door unlock output (oRrDrLkMt-1) is a signal output frombit 7 of communication IC 240 in RIM 140 shown in FIG. 13. Door lockoutput (oDrDRLk-2) is a signal output from bit 6 of communication IC 230in DDM shown in FIG. 11.

Between these 9 inputs and 6 outputs, there are logically interconnectedas indicated in FIG. 36 by three OR circuits (or1, or2, or4), and fourmono stable multi vibrators (timer 8-timer 11).

In the next, using FIGS. 37 and 38, and in reference to FIG. 36, controlcontents thereof will be described as a whole in the following.

From lines 3700 to 3705, there are described comment statements, whereina function name, functions, if there is an argument or not, and if thereis a return value or not are described.

In line 3706, it is defined that the function name “as-dorr-lock” hasnot return value.

In lines 3707 to 3711, definition statements are described defininginitial values (=0) of or1_-or4 and q1-q4, as well as variables (or1,or2, . . . , q4) to be used in this control task.

In lines 3712 and thereafter, execution statements are described whereinon the right-hand side of each execution statement and between “/*” and“*/”, a comment statement is given.

In line 3712, four output signals indicating status prior to the controlare read.

In lines 3713 to 3715, logics of OR circuits or1, or2 and or4 aredefined.

In lines 3716 to 3725, an output condition for AS lock output isdefined. When or1 becomes “1”, output q1 of the mono stable multivibrator is set at “1”, and the timer (timer8) starts its counting, thenafter 900 ms or upon input of or2, the same is reset.

In lines 3726 to 3735, an output condition for AS unlock output aredefined. When or2 becomes “1”, the output q1 of the mono stable vibratoris set at “1” and the timer (timer8) starts its counting, then afterelapse of 900 ms or upon input of or1, the same is reset.

In lines 3736 to 3745, an output condition for DR lock is defined. Whenor1 becomes “1”, output q1 of the mono stable multi vibrator is set at“1”, and the timer (timer 8) starts its counting, then after elapse of900 ms or upon input of or4, the same is reset.

In lines 3746 to 3755, an output condition for DR unlock output isdefined. When or4 becomes “1”, output q1 of the mono stable multivibrator is set at “1”, and the timer (timer 8) starts counting, thenafter 900 ms or upon input of or1, the same is reset.

In lines 3755 to 3762, output conditions for output signals are defined.Namely, when an output of q1 is “1”, AS door lock output (oDrASLk-2) andrear door lock output (oRrDrLkMt-2) become on-state. When an output ofq2 is “1”, AS door lock output (oDrASLk-1) and rear door unlock output(oRrDrLkMt-1) become on-state. Further, when an output of q3 is “1”,door lock output (oDrDRLk-2) becomes on-state. When output of q4 is “I”,door unlock output (oDrDRLk-1) becomes on-state.

In lines 3763 to 3768, an output signal after the control is read,compared with the output signal before the control, and if they do notagree with each other, namely, when the signal has changed, PDM, RIM,DDM data transfer flags are set on.

In lines 3769 to 3772, when q1, q2, q3 and q4 become “0”, the controltask of the AS door lock control is opened thereby ending the processingthereof.

As described above, in the AS door lock control, in response to a signalfrom the lock SW (iDrASClk, iDrDRClk, iRcLock, GateLKSw), the door lockmotor is driven to lock the doors, then, in response to a signal fromunlock SW (iRcDrUnlk, iDrDRUlk, iDrASUlk, iGateULKSw, iRcUnlock), thedoor lock motor is driven to unlock the doors.

Now, with reference to FIGS. 39 to 41, the seat belt alarm controlindicated at No. 10 in FIG. 19 will be described in the following.

FIGS. 39 (A)-(C) are functional block diagrams indicating a controlspecification of the seat belt alarm control in the power supply systemfor automobile according to one embodiment of the invention, and FIGS.40 and 41 are programming flowcharts of the control task to be executedin CPU in the power supply system for automobile according to the oneembodiment of the invention. By the way, its control program is writtenin C language.

Here, using FIG. 39, input/output signals in this control task andcontrol functions will be described in the following. As for inputsignals, there are four. Ignition SW1 (iIGNswOn-1) is a signal to beinput to bit 1-6 in CPU 200 in BCM 100 shown in FIG. 3. Ignition SW2(iIGNswOn-2) is a signal to be input to bit 1-5 in CPU 200 in BCM 100 inFIG. 3. Seat belt SW (iSftyBelt) is a signal to be input to bit 1-15 inCPU 200 in BCM 100 in FIG. 3. Starter SW (iIGNswST) is a signal to beinput to bit 1-30 in CPU 200 in BCM 100 in FIG. 3.

As for output signals, there are two. Seat belt warning lamp(oSfthBeltWan) is a signal output from bit o-1-3 in CPU 200 in BCM 100indicated in FIG. 3. A buzzer is directly controlled by CPU 200 in BCM100 shown in FIG. 3.

Between the four inputs and the two outputs, there are logicallyinterconnected as indicated in FIG. 39 by OR circuit (or14), two ANDcircuits (and1, and2), two inverting circuits (inv1, inv2), a logic OR,and oscillation circuits (timer 12, timer 13).

Now, using FIGS. 40 and 41 and in reference to FIG. 39, control contentsas a whole will be described in the following.

From lines 4000 to 4005, comment statements are described, wherein afunction name, functions, if there is an argument or not, and if thereis a return value or not are described.

In line 4000, it is defined that the function name “safty-belt-alarm”does not have a return value.

In lines 4007 to 4011, definition statements are given defining initialvalues (=0) of q and the like, as well as variables (and1, . . . , or1)to be used in this control task.

From lines 4012 and thereafter, execution statements are described,wherein on the right-hand side of each execution statement and between“/*” and “*/”, a comment statement is given.

From lines 4012 to 4017, each logic of OR circuit (or1), AND circuits(and1, and2), and inverting circuits (inv1, inv2) is defined.

From line 4018 to 4022, trigger conditions for logic OR are defined.From lines 4023 to 4927, a buzzer task for operating the buzzer isdefined as indicated in FIG. 39 (B). Further, from lines 4028 to 4045, alamp illumination pattern for illuminating the lamp is defined asindicated in FIG. 39 (C).

From lines 4046 to 4952, output conditions for the indicator aredefined. From lines 4053 to 4057, the buzzer is turned off, and thecontrol task is released thereby terminating the processing thereof.

As described above, in the seat belt warning control, while ignition SW(iIGNswOn-1 or iIGNswOn-2) is on and starter SW (iIGNswST) is also on,if seat belt SW becomes off, the seat belt warning lamp (oSfthBeltWan)is turned on and off so as to illuminate or flicker seat belt warninglamp (Safty belt warning) 364 at a predetermined timing, and the buzzeris operated.

In the next, using FIGS. 42 and 43, the key-left alarm control indicatedat No. 11 in FIG. 19 will be described in the following.

FIG. 42 is a functional block diagram indicating a control specificationof the key-left alarm control in the power supply system for automobileaccording to one embodiment of the invention, and FIG. 43 is aprogramming flowchart of a control task to be executed in CPU in thepower supply system for automobile according to the one embodiment ofthe invention. By the way, its control program is described in Clanguage.

Now, using FIG. 42, input/output signals in this control task andcontrol functions will be described. As for input signals, there aretwo. LH door jamb sw (iDorJambLH) is a signal to be input to bit 1-13 inCPU 200 in BCM 100 indicated in FIG. 3. Key insert sw (iIGNswKey) is asignal to be input to bit 1-32 in CPU 200 in BCM 100 in FIG. 3.

An output signal which is a warning buzzer is directly controlled by CPU200 in BCM 100.

Between the two inputs and the one output, there are logicallyinterconnected as indicated in FIG. 42 by inverting circuits of inv1,inv2, and an AND circuit of and1.

In the next, using FIG. 43 and in reference to FIG. 42, control contentsthereof will be described as a whole in the following.

From lines 4300 to 4305, comment statements are described, wherein afunction name, functions, if there is an argument or not, and if thereis a return value are described.

In line 4306, it is defined that the function name “key-alarm” does nothave a return value.

In lines 4307 and 4308, definition statements are described defining atask No. (=0) of the buzzer, and variables (inv1, . . . , and1) to beused in this task.

From lines 4309 and thereafter, execution statements are described,wherein on the right-hand side of each execution statement and between“/*” and “*/”, a comment statement is given.

From line 4309 to 4311, each logic of inverting circuits of inv1, inv2,and of AND circuit of and1 are defined.

From lines 4312 to 4318, output conditions for output signals aredefined. That is, when an output of and1 is “1”, buzzer task 1 isactivated, and in other cases, the task is opened.

In lines 4319 to 4320, the control task for the key-left alarm controlis released thereby terminating the processing thereof.

As described above, in the key-left warning control, the warning buzzeris sounded when the door beside the driver is opened and LH door jamb sw(iDorJambLH) becomes off while in a state that the key is inserted andKey insert sw (iIGNswKey) is off-state.

Now, using FIGS. 44 and 45, the light-on warning control indicated atNo.12 in FIG. 19 will be described in the following.

FIG. 44 is a functional block diagram indicating a control specificationof the light-on warning control in the power supply system forautomobile according to one embodiment of the invention, and FIG. 45 isa programming flowchart of a control task to be executed in CPU in thepower supply system for automobile according to the one embodiment ofthe invention. By the way, its control program is described in Clanguage.

Here, using FIG. 44, input/output signals in this control task, andcontrol functions will be described in the following. As for inputsignals, there are four. ACGL signal (iACG-L) is a signal to be input tobit 21 of communication IC 220 in FCM 120 indicated in FIG. 9. DR doorJambsw (iDORJamLH) is a signal to be input to bit 1-13 in CPU 200 in BCM100 in FIG. 3. Park lamp sw (iPOSOn) is a signal to be input to bit 1-3in CPU 200 in BCM 100 in FIG. 3. Head light Onsw (iLiteOn) is a signalto be input to bit 1-9 in CPU 200 in BCM 100 in FIG. 3.

An output signal which is for the alarm buzzer is directly controlled byCPU 200 in BCM 100.

Between the four inputs and the one output, there are logicallyinterconnected as indicated in FIG. 44 by inverting circuits (inv1,inv2) an AND circuit (and1), and an OR circuit (or1).

In the next, using FIG. 45 and in reference to FIG. 44, control contentsthereof will be described as a whole.

From lines 4500 to 4505, comment statements are described wherein afunction name, functions, if there is an argument or not, and if thereis a return value are described.

In line 4506, it is defined that the function name “light-alarm” doesnot have a return value.

From lines 4507 to 4508, definition statements are given setting a tasknumber (=2) of the buzzer and defining variables (inv1, . . . , and1) tobe used in this control task.

From lines 4509 and thereafter, execution statements are described,wherein on the right-hand side of each execution program and between“/*” and “*/”, a comment statement is given.

From lines 4509 to 4519, each logic of inverting circuits (inv1, inv2),AND circuit (and1) and OR circuit (or1) is defined.

From lines 4514 to 4519, output conditions for output signals aredefined. That is, when an output of and1 is at “1”, buzzer task 2 isactivated, and in any other cases, the task is released.

In lines 4520 and 4521, the control task for the light-on warningcontrol is opened and the processing thereof is terminated.

As described hereinabove, in the light-on alarm control of theinvention, the alarm buzzer is sounded when park lamp sw (iPOSOn) orhead light Onsw (iLiteOn) is at “H” level, and the lamp is on while theengine is running, ACGL signal (iACG-L) is at “L” level, the door besidethe driver is open, and DR door jambsw (iDORJamLH) is at “L” level.

Now, using FIGS. 46 to 48, the room lamp illumination control indicatedat No. 13 in FIG. 19 will be described in the following.

FIG. 46 is a functional block diagram indicating a control specificationfor the room lamp-on control in the power supply system for automobileaccording to one embodiment of the invention, and FIGS. 47 and 48 areprogramming flowcharts of a control task to be executed by CPU in thepower supply system for automobile according to the one embodiment ofthe invention. By the way, its control program is written in C language.

Here, using FIG. 46, input/output signals in this control task, andcontrol functions will be described hereinafter. As for input signals,there are eleven. IGN (RUN) SW1 (iIGNswOn-1) is a signal to be input tobit 1-6 in CPU 200 in BCM 100 indicated in FIG. 3. IGN (RUN) SW2(iIGNswOn-2) is a signal to be input to bit 1-5 in CPU 200 in BCM 100 inFIG. 3. RHDR door JamSW (iDorJamRH) is a signal to be input to bit 1-14in CPU 200 in BCM 100 in FIG. 3. LHDR door JamSW (iDorJamLH) is a signalto be input to bit 1-13 in CPU 200 in BCM 100 in FIG. 3. Door lock SW(iDrDRClk) is a signal to be input to bit 28 of communication IC 230 inDDM 130 indicated in FIG. 11. Rear door SW (iRearClk) is a signal to beinput to bit 21 of communication IC 240 in RIM 140 in FIG. 13. AS doorhandle SW (iDrASHd1) is a signal to be input to bit 30 of communicationIC 260 in PDM 160 shown in FIG. 17. DR door handle SW (iDrDRHd1) is asignal to be input to bit 30 of communication IC 230 in DDM 130 in FIG.11. Keyless DR unlock (iRcDrUnlk) is a signal to be input to bit 1-27 inCPU 200 in BCM 100 in FIG. 3. Panel Dimmer SW (iPDimOn) is a signal tobe input to bit 1-20 in CPU 200 in BCM 100 in FIG. 3. End gate door SW(iGateJambSW) is a signal to be input to bit 31 of communication IC 240in RIM 140 in FIG. 13.

As for output signals, there are two. Front courtesy lamp (oCortsy) is asignal output from bit o-2-2 in CPU 200 in BCM 100 in FIG. 3. Rear domelamp (oOrDome) is a signal output from bit 2 of communication IC 240 inFIM 140 in FIG. 13.

Between the eleven inputs and the two outputs, there are logicallyinterconnected as indicated in FIG. 46 by two AND circuits (and1, and2),five OR circuits (or1, or2, or5-or7), a timer circuit (oscillator)(timer 15), six inverting circuits (inv1-inv6), three trigger circuits(ff1-ff3), and two trigger switch circuits (tg1, tg2).

In the next, using FIGS. 47 and 48 as well as in reference to FIG. 46,control contents thereof will be described in the following as a whole.

From lines 4700 to 4705, comment statements are described, wherein afunction name, functions, if there is an argument or not, and if thereis a return value or not are described.

In line 4706, it is defined that the function name “room-lamp” has noreturn value.

From lines 4707 to 4711, definition statements are described definingvariables (ff1, . . . , after) to be used in this control task.

From lines 4712 and thereafter, execution statements are described,wherein on the right-hand side of each execution program and between“/*” and “*/”, a comment statement is given.

In line 4712, an output signal (oRrDome) indicating a status prior tothe control is read.

From lines 4713 to 4723, logic of two AND circuits (and2, and3), threeOR circuits (or, or2, or5) and six inverting circuits (inv1-inv6) isdefined.

In lines 4724 to 4732, a forty-second timer (timer 15) for illuminatingthe room lamp for 40 seconds when the door is opened is activated.

In lines 4733 to 4741, the forty-second timer 15 is activated forilluminating the room lamp for forty seconds when the door handle andthe keyless entry are operated.

In lines 4742 to 4750, the forty-second timer (timer 15) is activatedfor illuminating the room lamp for 2 seconds when detecting the doorlock.

In lines 4751 to 4761, trigger conditions ff1-ff3 are released, then thetimer (timer 15) is reset.

In lines 4762 to 4764, and 4765, each logic of the two invertingcircuits (tg1, tg2) and two OR circuits (or6, or′) is defined.

From lines 4765 to 4767, output conditions for the two outputs aredefined. That is, the front courtesy lamp (oCortsy) which turns on thecourtesy lamp becomes on-state when or6 is “1”, and rear dome lamp(oOrDome) which turns on the rear dome lamp becomes on-state when or7 is“1”.

From lines 4768 to 4771, an output signal after the control is read,compared with the output signal before the control, and when they do notagree with each other, namely, when the signal has changed, RIM datatransfer flag is set on.

In lines 4772 to 4774, when q1 becomes “0”, the control task for theroom lamp turn-on control is released, and the processing thereof isterminated.

As described hereinabove, in the room lamp turn-on control of theinvention, at such times when the door is opened, the door handle isoperated, the keyless entry is operated and the door lock is sensed, thefront courtesy lamp (oCortsy) is set at “1” so as to illuminate courtesylamp 369 for a predetermined period of time, and further when the endgate door is operated at the times described above, the rear dome lamp(oOrDome) is set “1” to illuminate rear dome lamp 149.

Now, using FIGS. 49 to 51, the door mirror control indicated at No. 14in FIG. 19 will be described.

FIG. 49 is a flow chart indicating a control specification of the doormirror control in the power supply system for automobile according toone embodiment of the invention, and FIGS. 50 and 51 are programmingflowcharts of a control task to be executed by CPU in the power supplysystem for automobile according to the one embodiment of the invention.By the way, its control program is described in C language.

Here, using FIG. 49, input/output signals used in this control task, andcontrol functions will be described in the following. As for inputsignals, there are six. Door mirror select RHsw (iDmRHSel) is a signalto be input to bit 17 in communication IC 230 in DDM 130 indicated inFIG. 11. Door mirror select LHsw (iDmLHSel) is a signal to be input tobit 16 in communication IC 230 in DDM 130 in FIG. 11. Door mirror-up sw(iDmUP) is a signal to be input to bit 15 of communication IC 230 in DDM130 in FIG. 11. Door mirror-down sw (iDmDN) is a signal to be input tobit 14 of communication IC 230 in DDM 130 in FIG. 11. Door mirror leftsw (iDmLH) is a signal to be input to bit 13 of communication IC 230 inDDM 130 in FIG. 11. Door mirror right sw (iDmRH) is a signal to be inputto bit 12 of communication IC 230 in DDM 130 in FIG. 11.

As for output signals, there are eight. DR mirror right/left motoroutput 1 (oLHMirRLH-1) is a signal output from bit 3 of communication IC230 in DDM 130 in FIG. 11. DR mirror right/left motor output 2(oLHMirRLH-2) is a signal output from bit 2 of communication IC 230 inDDM 130 in FIG. 11. DR mirror up/down motor output 1 (oLHMirUD-1) is asignal output from bit 1 of communication IC 230 in DDM 130 in FIG. 11.DR mirror up/down motor output 2 (oLHMirUD-2) is a signal output frombit 0 of communication IC 230 in DDM 130 in FIG. 11. AS mirrorright/left motor output 1 (oRHMirRLH-1) is a signal output from bit 19of communication IC 260 in PDM 160 in FIG. 17. AS mirror right/leftmotor output 2 (oRHMirRLH-2) is a signal output from bit 18 ofcommunication IC 260 in PDM 160 in FIG. 17. AS mirror up/down motoroutput 1 (oRHMirUD-1) is a signal output from bit 17 of communication IC260 in PDM 160 in FIG. 17. AS mirror up/down output 2 (oRHMirUD-2) is asignal output from bit 16 of communication IC 260 in PDM 160 in FIG. 17.

Between the six inputs and the eight outputs, they are logicallydetermined according to the flow chart and truth table TVT as indicatedin FIG. 49.

In the next, using FIGS. 50 and 51 and further in reference to FIG. 49,control contents thereof will be described as a whole in the following.

From lines 5000 to 5005, comment statements are described wherein afunction name, functions, if there is an argument or not and if there isa return value or not are described.

In line 5006, it is defined that the function name “door-mirror” has noreturn value.

From lines 5007 to 5008, a definition statement is described definingvariables (drive-up-down, drive-left-right) to be used in this controltask.

From lines 5009 and thereafter, execution statements are described,wherein on the right-hand side of each execution program and between“/*” and “*/”, a comment statement is described.

In lines 5009 to 5010, a value of variables (drive-up-down,drive-left-right) is defined.

In line 5011, it is determined if the left mirror is selected or not instep 4901 in FIG. 49, and if the left mirror is selected, lines 5012 to5026 are executed.

In lines 5012 to 5018, up/down motion of the mirror is executedaccording to the truth table TVT1 indicated in FIG. 49. When door mirrorup sw (iDmUP) is at “1”, DR mirror up/down motor output 1 (oLHMirUD-1)is set on, and when door mirror down sw (iDmDN) is “1”, DR mirrorup/down motor output 2 (oLHMirUD-2) is set on.

In lines 5019 to 5026, right/left motion of the mirror is executedaccording to truth table TVT2 indicated in FIG. 49. When door mirrorright sw (iDmRH) is “1”, DR mirror right/left motor output 1(oLHMirRLH-1) is set on, and when door mirror left SW (iDmLH) is “1”, DRmirror right/left motor output 2 (oLHMirRLH-2) is set on.

Further, in lines 5027 to 5030, if it is not the right mirror, either ofthe outputs are set off according to truth table TVT5.

In line 5031, it is judged if the right mirror is selected or not instep 4902 in FIG. 49, and if the right mirror is selected, lines 5032 to5046 are executed.

In lines 5032 to 5038, the control of up/down motion the mirror isexecuted in the same way as in lines 012 to 5018. Further, in lines 5039to 5046, the control of right/left motion of the mirror is executed inthe same way as in lines 5019 to 5026. Still further, in lines 5047 to5050, if it is not the left mirror, any output is set off according totruth table TVT5.

In lines 5051-5052, DDM and PDM data transfer flags are set on.

In lines 5053-5054, the control task of the door mirror control isreleased and the processing thereof is terminated.

As described above, in the door mirror control of the invention, inresponse to an input signal selecting either of the right/left doormirrors, and up/down or right/left motion, an output signal is turned onand off so as to actuate the right/left door mirrors.

In the next, using FIGS. 52 and 53, the accessory power supply controlindicated at No. 15 in FIG. 19 will be described.

FIG. 52 is a functional block diagram indicating a control specificationof the accessory power supply control in the power supply system forautomobile according to one embodiment of the invention, and FIG. 53 isa program flowchart of a control task to be executed by CPU in the powersupply system for automobile according to the one embodiment of theinvention. By the way, its control program is described in C language.

Here, using FIG. 52, input/output signals in this control task, andfunctions will be described hereinafter. There are four input signals.Ignition SW1 (iIGNswOn-1) is a signal to be input to bit 1-6 of CPU 200in BCM 100 in FIG. 3. Ignition SW2 (iIGNswOn-2) is a signal to be inputto bit 1-5 of CPU 200 in BCM 100 in FIG. 3. Accessory SW (iIGNswAcc) isa signal to be input to bit 1-4 in CPU 200 in BCM 100 in FIG. 3. StarterSW (iIGNswST) is a signal to be input to bit 1-30 in CPU 200 in BCM 100in FIG. 3.

As for output signals, there are five. Accessory power supply output(oVbACC) is a signal output from bit o-4-5 in CPU 200 in BCM 100 of FIG.3. Rear wiper power supply (oRrWipPwr) is a signal output from bit 19 ofcommunication IC 240 in RIM 140 in FIG. 13. Battery power supply(oVbBAT) is a signal output from bit o-4-4 in CPU 200 in BCM 100 in FIG.3. Battery power supply 2 (oVbBAT2) is a signal output from bit o-4-6 inCPU 200 in BCM 100 in FIG. 3. Battery power supply 3 (oVbBAT3) is asignal output from bit o-4-7 in CPU 200 in BCM 100 in FIG. 3.

Between the four inputs and the five outputs, there are logicallyinterconnected as indicated in FIG. 52 by AND circuit (and1), OR circuit(or1), and inverting circuit (inv1).

In the next, using FIG. 53 and further in reference to FIG. 52, controlcontents thereof will be described as a whole in the following.

From lines 5300 to 5305, comment statements are described, wherein afunction name, functions, if there is an argument or not, and if thereis a return value or not are described.

In line 5306, it is defined that the function name “accessory-volt” doesnot have a return value.

From line 5307 to 5309, definition statements are described definingvariables (or1, and1, . . . , after) to be used in this control task.

From lines 5310 and thereafter, execution statements are described,wherein on the right-hand side of each execution program and between“/*” and “*/”, a comment statement is given.

In line 5310, an output signal indicative of the status prior to thecontrol (oRrWipPwr) is read.

In lines 5311 to 5313, each logic of OR circuit or1, inverting circuitinv1, and AND circuit and1 is defined. Here, when starter SW (iIGNswST)becomes off while in a condition where accessory SW (iIGNswAcc) orignition SW (iIGNswOn-1 or iIGNswOn-2) is on-state, the output of and1becomes “H” level.

In lines 5314 to 5324, output conditions are defined. When and1 becomes“1”, all of the accessory power supply output (oVbACC), rear wiper power(oRrWipPwr), battery power supply (oVbBAT), battery power supply 2(oVbBAT2) and battery power supply 3 (oVbBAT3) are caused to be on.

In lines 5325 to 5328, an output signal after the control is read,compared with the output signal before the control, and if they do notagree with each other, namely, when the signal has changed, RIM datatransfer flag is set on.

In lines 5329 to 5330, the control task of the accessory power supplycontrol is released and the processing thereof is terminated.

As described hereinabove, in the accessory power supply control, whenthe starter SW (iIGNswST) is off-state while in the condition whereaccessory SW (iIGNswAcc) or ignition SW (iIGNswOn-1 or IIGNswOn-2) ison-state, all of the accessory power supply output (oVbACC), rear wiperpower (oRrWipPwr), battery power supply (oVbBAT), battery power supply 2(oVbBAT2) and battery power supply 3 (oVbBAT3) are caused to becomeon-state so as to supply power to the accessories.

In the next, using FIGS. 54 and 55, IGN power supply control indicatedat No. 16 in FIG. 19 will be described.

FIG. 54 is a functional block diagram indicating a control specificationof the IGN power supply control in the power supply system forautomobile according to one embodiment of the invention, and FIG. 55 isa programming flowchart of a control task to be executed by CPU in thepower supply system for automobile according to the one embodiment ofthe invention. By the way, its control program is described in Clanguage.

Here, using FIG. 54, input/output signals in this control task, andcontrol functions will be described in the following. There are threeinput signals. Ignition SW1 (iIGNswOn-1) is a signal to be input to bit1-6 of CPU 200 in BCM 100 in FIG. 3. Ignition SW2 (iIGNswOn-2) is asignal to be input to bit 15 5 of CPU 200 in BCM 300 in FIG. 3. StarterSW (iIGNswST) is a signal to be input to bit 1-30 of CPU 200 in BCM 100in FIG. 3.

As for output signals, there are nine. Ignition power supply (oVbIGN1)is a signal output from bit o-4-2 of CPU 200 in BCM 100 in FIG. 3.Ignition power supply 2 (oVbIGN2) is a signal output from bit o-4-3 ofCPU 200 in BCM 100 in FIG. 3. Ignition power supply 3 (oVbIGN3) is asignal output from bit o-4-1 of CPU 200 in BCM 100 in FIG. 3. Batterypower supply (oVbBAT) is a signal output from bit o-4-4 of CPU 200 inBCM 100 in FIG. 3. Battery power supply 2 (oVbBAT2) is a signal outputfrom bit o-4-6 of CPU 200 in BCM 100 in FIG. 3. Battery power supply 3(oVbBAT3) is a signal output from bit o-4-7 of CPU 200 in BCM 100 inFIG. 3. FIM power supply 1 (oIgnIoutFIM) is a signal output from bit 13of communication IC 220 in FIM 120 shown in FIG. 9. FIM power supply 2(oIgn2outFIM) is a signal output from bit 10 of communication IC 220 inFIM 120 in FIG. 9. FIM power supply 3 (oIgn3outFIM) is a signal outputfrom bit 11 of communication IC 220 in FIM 120 in FIG. 9.

Between the three inputs and the nine outputs, there are logicallyinterconnected as indicated in FIG. 54 by OR circuit or1 and invertingcircuit inv1.

Then, using FIG. 55 and further with reference to FIG. 54, overallcontrol contents will be described in the following.

From lines 5500 to 5505, comment statements are described, wherein afunction name, functions, if there is an argument or not, and if thereis a return value or not are described.

In line 5506, it is defined that the function name “ignition-volt” hasno return value.

From lines 5507 to 5509, definition statements are described definingvariables (inv1, . . . , or1) to be used in this control task.

From lines 5510 and thereafter, execution statements are described,wherein on the right-hand side of each execution program and between“/*” and “*/”, a comment statement is described.

In line 5510, an output signal indicating the status prior to thecontrol (oIgn1outFIM) is read.

In lines 5511 to 5512, each logic of OR circuit or1 and invertingcircuit inv1 is defined. Here, when ignition SW (iIGNswOn-1 oriIGNswOn-2) is on-state or when starter SW (iIGNswST) is off-state, theoutput of or1 becomes “H” level.

In lines 5513 to 5531, output conditions are defined. Thereby, when or1becomes “1”, ignition power supply (oVbIGN1; oVbIGN2; oVbIGN3), batterypower supply (oVbBAT; oVbBAT2; oVbBAT3) and FIM power supply(oIgnloutFIM; oIgn2outFIM; oIgn3outFIM) are caused to become on-state.

In lines 5532 to 5535, an output signal after the control is read,compared with the output signal before the control, and if they do notagree with each other, namely, when the signal has changed, FIM datatransfer flag is set on.

In lines 5536-5537, the control task of the IGN power supply control isreleased and the processing thereof is terminated.

As described heretofore, in the IGN power supply control of theinvention, in the state where ignition SW (iIGNswOn-1 or iIGNswOn-2) ison-state or starter SW (iIGNswST) is off-state, ignition power supply(oVbIGN1; oVbIGN2; oVbIGN3), battery power supply (oVbBAT; oVbBAT2;oVbBAT3) and FIM power supply (oIgnloutFIM; oIgn2outFIM; oIgn3outFIM)are caused to become on-state so as to supply power to the IGNs.

In the next, using FIGS. 56 and 57, the rear gate release controlindicated at No. 18 in FIG. 19 will be described in the following.

FIG. 56 is a functional block diagram indicating a control specificationof the rear gate release control in the power supply system forautomobile according to one embodiment of the invention, and FIG. 57 isa program chart of a control task to be executed by CPU in the powersupply system for automobile according to the one embodiment of theinvention. By the way, its control program is described in C language.

Here, using FIG. 56, input/output signals in this control task, andcontrol functions will be described. There are five input signals.P/NP(LR)SW (iPNLR) is a signal to be input to bit 29 of communication IC220 in FCM 120 in FIG. 9. Front side lift gate release SW (iLftOpen) isa signal to be input to bit 1-19 of CPU 200 in BCM 100 in FIG. 3.Keyless release SW (iRcLftOpn) is a signal to be input to bit 2-24 ofCPU 200 in BCM 100 in FIG. 3. End gate release SW (iGateReLease) is asignal to be input to bit 30 of communication IC 240 in RIM 140 in FIG.13. DR door lock detection SW (iDrDRDlk) is a signal to be input to bit31 of communication IC 230 in DDM 130 in FIG. 11.

An output signal which is a rear gate release signal (oGateOpen) is asignal output from bit 16 of communication IC 240 in RIM 140 indicatedin FIG. 13.

Between the five inputs and the one output, there are logicallyinterconnected as indicated in FIG. 56 by two AND circuits (and1, and2),OR circuit (or1) and a mono stable multi vibrator timer 14.

In the next, using FIG. 57 and further with reference to FIG. 56,overall control contents thereof will be described in the following.

From lines 5700 to 5705, comment statements are described, wherein afunction name, functions, if there is an argument or not, and if thereis a return value or not are described.

In line 5706, it is defined that the function name “rear-gate-open” doesnot have a return value.

From lines 5707 to 5710, definition statements are described defininginitial values (=0) of or1_ and q1, and variables (or1, and1, . . . ,after) to be used in this control task.

From lines 5711 and thereafter, execution statements are described,wherein on the right-hand side of each execution program and between“/*” and “*/”, a comment statement is given.

In line 5711, the output signal indicating the status before the control(oGateOpen) is read.

In lines 5712-5713, logic of OR circuit or1 and AND circuit and1 isdefined. By way of example, or1 executes logic OR between an invertedsignal of lift gate release SW (iLftOpen), keyless release SW(iRcLftOpn), and end gate release SW (iGateReLease).

In lines 5714 to 5721, a count-up condition for the counter is defined,a stop condition for the counter is defined, and the operation of amono-stable multi-vibrator timer 14 is defined. A period of time foroperating the mono-stable multi-vibrator timer 14 is defined to be 700ms, and for this period of time, solenoid 147 to which rear gate releasesignal (oGateOpen) is input is operated.

In line 5722, logic of AND circuit and2 is defined.

In line 5723, output condition for an output signal is defined. Namely,when an output of and2 is “1”, its output signal becomes on.

In lines 5724 to 5727, an output signal after the control is read,compared with the output signal before the control, and if they do notagree with each other, namely, when the signal has changed, RIM datatransfer flag is set on.

In lines 5728 to 5731, when q1 becomes “0”, the control task of the reargate release control is opened, and the processing thereof ends.

As described above, in the rear gate release control of the invention,when the shift lever is at a position which allows release, that is,when P/NP(LR)SW (iPNP-LR) is on and release SW (iLftOpen; iRcLftOpn;iGateRelease) is on, the rear gate release signal (oGateOpen) is causedto be on for a predetermined period of time to operate solenoid 147.

In the next, using FIGS. 58 and 59, the shift interlock controlindicated at No. 18 in FIG. 19 will be described.

FIG. 58 is a functional block diagram indicating a control specificationof the shift interlock control in the power supply system for automobileaccording to one embodiment of the invention, and FIG. 59 is a programflowchart of a control task to be executed by CPU in the power supplysystem for automobile according to the one embodiment of the invention.By the way, its control program is written in C language.

Here, with reference to FIG. 58, input/output signals in this controltask and control functions will be described in the following. There arefive input signals. Ignition SW1 (iIGNswOn-1) is a signal to be input tobit 1-6 of CPU 200 in BCM 100 shown in FIG. 3. Ignition SW2 (iIGNswOn-2)is a signal to be input to bit 1-5 of CPU 200 in BCM 100 in FIG. 3.Starter SW (iIGNswST) is a signal to be input to bit 1-30 of CPU 200 inBCM 100 in FIG. 3. TTC stop SW (iStopSw) is a signal to be input to bit1-12 of CPU 200 in BCM 100 in FIG. 3. P/NP (SI) SW (iPNSI) is a signalto be input to bit 28 of communication IC 220 in FIM 120 in FIG. 9.

An output signal which is for shift interlock (oSftItLok) is a signaloutput from bit o-4-0 of CPU 200 in BCM 100 in FIG.

Between the five inputs and the one output, there are logicallyinterconnected as indicated in FIG. 58 by OR circuit or1, AND circuitand1, and inverting circuit inv1.

In the next, with reference to FIG. 59, overall control contents thereofwill be described in the following.

From lines 5900 to 5905, comment statements are described, wherein afunction name, functions, if there is an argument or not, and if thereis a return value or not are described.

In line 5906, it is defined that the function name “shift-interlock”doest not have a return value.

In lines 5907-5908, a definition statement is described definingvariables (inv1, . . . , and1) to be used in this control task.

In lines 5909 and thereafter, execution statements are described whereinon the right-hand side of each execution program and between “/*” and“*/”, a comment statement is written.

In lines 5909 to 5911, each logic of OR circuit or1, AND circuit and1,and inverting circuit inv1 is defined. Here, when ignition SW(iIGNswOn-I or iIGNswOn-2) is on or when starter SW (iIGNswST) is off,the output of or1 becomes “H” level.

In line 5912, an output condition is defined such that when inv1 becomes“1”, shift interlock (oSftItLok) becomes on.

In lines 5913-5914, the control task of the shift interlock control isopened and the processing thereof ends.

As described above, in the shift interlock control of the invention,when ignition SW (iIGNswOn-1 or iIGNswOn-2) is on-state, or when starterSW (iIGNswST) is off-state and both TTC stop SW (iStopSw) and P/NP (SI)SW (iPNSI) are on-state, the shift interlock (oSftItLok) is caused tobecome off-state thereby stopping current conduction to solenoid 377,and releasing the interlock.

Now, the vehicle speed measurement control indicated at No. 19 in FIG.19 will be described in the following. In the vehicle speed measurementcontrol of the invention, on the basis of vehicle speed data (VCM16 toVCM23) input from bits 16 to 23 of communication IC 210 in VCM 110 shownin FIG. 7, BCM 100 obtains a vehicle speed VSP by calculation accordingto the following equation;

VSP=4394.5313×32.0×(vehicle speed data).

In the next, with reference to FIGS. 60 and 61, the high-mount stop lampcontrol indicated at No. 20 in FIG. 19 will be described.

FIG. 60 is a functional block diagram indicating a control specificationof the high-mount stop lamp control in the power supply system forautomobile according to one embodiment of the invention, and FIG. 61 isa program flowchart of a control task to be executed by CPU in the powersupply system for automobile according to the one embodiment of theinvention. By the way, its control program is written in C language.

Here, using FIG. 60, input/output signals in this control task andcontrol functions will be described in the following. An input signalwhich is stop lamp SW (iStopSw) is a signal to be input to bit 1-12 ofCPU 200 in BCM 100 in FIG. 3. An output signal which is center stop lampoutput (oHiMountSTP) is a signal output from bit 13 of communication IC240 in RIM 140 in FIG. 13. Between the one input and the one output,they are logically interconnected in a direct coupling as indicated inFIG. 60.

In the next, using FIG. 61 and further in reference to FIG. 60, overallcontrol contents there of will be described.

In lines 6100 to 6105, comment statements are described, wherein afunction name, functions, if there is an argument or not, and if thereis a return value or not are described.

In line 6106, it is defined that the function name “high-mount-stoplamp”does not have a return value.

In lines 6107-6108, a definition statement is described definingvariables (before, after) to be used in this control task.

In line 6109 and thereafter, execution statements are described, whereinon the right-hand side of each execution program and between “/*” and“*/”, a comment statement is described.

In line 6109, the output signal indicative of the status prior to thecontrol is read.

In lines 6110 to 6113, output conditions of output signals are defined.Namely, when stop lamp SW (iStopsw) is “1”, center stop lamp output(oHiMountSTP) becomes on-state, and in any other events, the samebecomes off-state.

In lines 6114 to 6117, an output signal after the control s read,compared with the output signal before the control, and if they do notagree with each other, that is, when the signal as changed, RIM datatransfer flag is set on.

In lines 6118 to 6119, the control task of the high-mount top lampcontrol is released, and the processing thereof is terminated.

As described above, in the high-mount stop lamp control f the invention,when stop lamp SW (iStopSw) is on, center stop lamp output (oHiMountSTP)becomes on thereby illuminating center stop lamp (high-mound lamp) 145.

In the next, with reference to FIGS. 62 and 63, the horn controlindicated at No. 21 in FIG. 19 will be described.

FIG. 62 is a functional block diagram indicating a control specificationin the power supply system for automobile according to one embodiment ofthe invention, and FIG. 63 is a program flowchart of a control task tobe executed by CPU in the power supply system for automobile accordingto the one embodiment of the invention. By the way, its control programis written in C language.

Here, using FIG. 62, input/output signals in this control task andcontrol functions will be described. Its input signal which is a horn SW(iHorn) is a signal to be input to bit 1-27 of CPU 200 in BCM 100 inFIG. 3. Its output signal which is a horn drive signal (oHorn) is asignal output from bit 12 of communication IC 220 in FIM 120 in FIG. 9.Between the one input and the one output, there are logicallyinterconnected as shown in FIG. 62 by inverting circuit inv.

Now, using FIG. 63 and further in reference to FIG. 62, overall controlcontents thereof will be described in the following.

From lines 6300 to 6305, comment statements are described wherein afunction name, functions, if there is an argument or not, and if thereis a return value or not are described.

In line 6306, it is defined that the function name “horn” does not takea return value.

In lines 6307-6308, a definition statement is described definingvariables (before, after) to be used in this control task.

In lines 6309 and thereafter, execution statements are described,wherein on the right-hand side of each execution program and between“/*” and “*/”, a comment statement is written.

In line 6309, the output signal indicative of the status before thecontrol (oHorn) is read.

In lines 6310 to 6313, output conditions for output signals are defined.That is, when an inversion of horn SW (iHorn) is “1”, horn drive signal(oHorn) becomes on, and else, the same becomes off.

In lines 6314 to 6317, an output signal after the control is read,compared with the output signal before the control, and if they do notagree with each other, namely, when the signal has changed, FIM datatransfer flag is set on.

In lines 6318-6319, the control task of the horn control is opened, andthe processing thereof is terminated.

As described above, in the horn control of the invention, when theinversion of horn SW (iHorn) is on, horn drive signal (oHorn) becomes onso as to sound horn 125.

Now, with reference to FIGS. 64 and 65, the rear dome lamp controlindicated at No. 22 in FIG. 19 will be described in the following.

FIG. 64 is a functional block diagram indicating a control specificationof the rear dome lamp control in the power supply system for automobileaccording to one embodiment of the invention, and FIG. 65 is a programflowchart of a control task to be executed by CPU in the power supplysystem for automobile according to the one embodiment of the invention.By the way, its control program is written in C language.

Here, using FIG. 64, input/output signals in this control task andcontrol functions will be described in the following.

There are five input signals. RH door JamSw (iDorJamRH) is a signal tobe input to bit 1-14 of CPU 200 in BCM 100 in FIG. 3. LH door JamSw(iDorJamLH) is a signal to be input to bit 1-13 of CPU 200 in BCM 100 inFIG. 3. End gate JamSW (iGateJamSw) is a signal to be input to bit 31 ofcommunication IC 240 in RIM 140 in FIG. 13. Rear door JamSW (iRearJamb)is a signal to be input to bit 21 of communication IC 240 in RIM 140 inFIG. 13. Illumination all turn-on Sw (iPDimOn) is a signal to be inputto bit 1-20 of CPU 200 in BCM 100 in FIG. 3.

Its output signal which is a rear dome lamp output (oRrDome) is a signaloutput from bit 2 of communication IC 240 in RIM 140 in FIG. 13.

Between the five inputs and the one output, there are logicallyinterconnected as shown in FIG. 64 by two OR circuits or1, or2, and fourinverting circuits inv1.

In the next, using FIG. 65 and further with reference to FIG. 64,overall control contents there of will be described in the following.

From line 6500 to 6505, comment statements are described, wherein afunction name, functions, if there is an argument or not, and if thereis a return value or not are described.

In line 6506, it is defined that the function name “rear-doom-lamp” hasno return value.

In lines 6507-6509, a definition statement is described definingvariables (before, . . . , or1) to be used in this control task.

In lines 6510 and thereafter, execution statements are described,wherein on the right-hand side of each execution program and between“/*” and “*/”, a comment statement is written.

In line 6510, the output signal indicative of the status prior to thecontrol (oRrDome) is read.

In lines 6511 to 6513, each logic of inverting circuit inv1 and ORcircuits or1, or2 is defined.

In line 6514, an output condition for output signals is defined. Thatis, when door gate Sw (iDorJamRH; iDorJamLH;

iGateJamSw; iRearjamb) becomes on, or when illumination all-on Sw(iPDimon) becomes on, the rear dome lamp output (oRrDome) is caused tobecome on.

In lines 6515 to 6517, an output signal after the control is read,compared with the output signal before the control, and if they do notagree with each other, namely, when the signal has changed, RIM datatransfer flag is set on.

In lines 6518-6519, the control task of the rear dome lamp control isopened, and the processing thereof is terminated.

As described above, in the rear dome lamp control of the invention, wheneither of door gate Sw (iDorJamRH; iDorJamLH; iGateJamsw; iRearjamb) andillumination all-on Sw (iPDimOn) becomes on, the rear dome lamp output(oRrDome) is caused to become on so as to illuminate rear dome lamp 145.

Now, with reference to FIGS. 66 and 67, the battery indicator controldepicted at No. 23 in FIG. 19 will be described in the following.

FIG. 66 is a functional block diagram indicating a control specificationof the battery indicator control in the power supply system forautomobile according to one embodiment of the invention, and FIG. 67 isa program flowchart of a control task bo te executed by CPU in the powersupply system for automobile according to the one embodiment of theinvention. By the way, its control program is written in C language.

Here, using FIG. 66, input/output signals in this control task andcontrol functions will be described. There are four input signals.Starter SW (iIGNswST) is a signal to be input to bit 1-30 of CPU 200 inBCM 100 in FIG. 3. Ignition SW1 (iIGNswOn-1) is a signal to be input tobit 1-6 of CPU 200 in BCM 100 in FIG. 3. Ignition SW2 (iIGNswOn-2) is asignal to be input to bit 1-5 of CPU 200 in BCM 100 in FIG. 3. ACG Lsignal (iACG-L) is a signal to be input to bit 21 of communication IC220 in FIM 120 in FIG. 9.

An output signal which is a battery indicator output (oCHGInd) is asignal output from bit o-3-0 of CPU 200 in BCM 100 in FIG. 3.

Between the four inputs and the one output, there are logicallyinterconnected as indicated in FIG. 66 by AND circuit and1, two ORcircuits or1, or2, and two inverting circuits inv1, inv2.

Now, using FIG. 67 and further with reference to FIG. 66, overallcontrol contents there of will be described in the following.

In lines 6700 to 6705, comment statements are described wherein afunction name, functions, if there is an argument or not, and if thereis a return value or not are described.

In line 6706, it is defined that the function name “battery-lamp” has noreturn value.

In lines 6707 to 6709, definition statements are described definingvariables (before, . . . , or2) to be used in this control task.

In lines 6710 and thereafter, execution statements are described,wherein on the right-hand side of each execution program and between“/*” and “*/”, a comment statement is written.

In line 6710, the output signal indicative of the status before thecontrol (oCHGInd) is read.

In lines 6711 to 6715, each logic of inverting circuits inv1, inv2, ORcircuits or1, or2, and AND circuit and1 is defined.

In line 6716, an output condition is defined such that when or2 becomes“1”, battery indicator output (oCHGInd) is set on.

In line 6717, an output signal after the control is read, in lines6718-6719, the control task of the battery indicator control isreleased, and the processing thereof is terminated.

As described above, in the battery indicator control of the invention,when starter SW (iIGNswST) is off, or when ignition SW (iIGNswOn-1 oriIGNswOn-2) is on-state and at the same time ACG L signal (iACG-L) isoff-state, the battery indicator output (oCHGInd) is caused to become onsuch that charge indicator (Charge Indicator) 376 is illuminated.

Now, with reference to FIGS. 68 and 69, the brake warning lamp controlindicated at No. 24 in FIG. 19 will be described in the following.

FIG. 68 is a functional block diagram indicating a control specificationof the brake warning lamp control in the power supply system forautomobile according to one embodiment of the invention, and FIG. 69 isa programming flowchart of a control task to be executed by CPU in thepower supply system for automobile according to the one embodiment ofthe invention. By the way, its control program is written in C language.

Here, using FIG. 68, input/output signals in this control task andcontrol functions will be described in the following.

There are five input signals. Starter SW (iIGNswST) is a signal to beinput to bit 1-30 of CPU 200 in BCM 100 in FIG. 3. Ignition SW1(iIGNswOn-1) is a signal to be input to bit 1-6 of CPU 200 in BCM 100 inFIG. 3. Ignition SW2 ((iIGNswOn-2) is a signal to be input to bit 1-5 ofCPU 200 in BCM 100 in FIG. 3. Brake signal (iVcmBrk) is a signal to beinput to bit 26 of communication IC 210 in VCM 110 in FIG. 7. Parkingbrake warning SW (iPrkBrkwarn) is a signal to be input to bit 1-8 of CPU200 in BCM 100 in FIG. 3.

An output signal which is a brake warning indicator output (oBrkWarn) isa signal output from bit o-3-1 of CPU 200 in BCM 100 in FIG. 3.

Between the five inputs and the one output, there are logicallyinterconnected as indicated in FIG. 68 by AND circuit and1, three ORcircuits or1-or3, and two inverting circuits inv1, inv2.

Now, using FIG. 69 and further with reference to FIG. 68, overallcontrol contents thereof will be described in the following.

In lines 6900 to 6905, comment statements are described, wherein afunction name, functions, if there is an argument or not and if there isa return value or not are described.

In line 6906, it is defined that the function name “brake-lamp” takes noreturn value.

In lines 6907-6908, a definition statement is described definingvariables (inv1, . . . , or3) to be used in this control task.

In lines 6909 and thereafter, execution statements are written, whereinon the right-hand side of each execution program and between “/*” and“*/”, a comment statement is described.

In lines 6909 to 6914, each logic of inverting circuits inv1, inv2, ORcircuits or1-or3, and AND circuit and1 is defined.

In line 6915, an output condition is defined such that when or2 becomes“1”, brake warning indicator output (oBrkWarn) is caused to become on.

In lines 6916-6917, the control task of the brake warning lamp controlis released, and the processing thereof is terminated.

As described above, in the brake warning lamp control of the invention,when starter SW (iIGNswST) is off, or when ignition SW (iIGNswOn-1 oriIGNswOn-2) is on-state and at the same time brake signal (iVcmBrk) ison, or parking brake warning SW (iPrkBrkWarn) is off-state, the brakewarning indicator output (oBrkWarn) is turned on so as to illuminatebrake warning indicator (Brake warning Indicator) 675.

Now, with reference to FIGS. 70 and 71, DRL indicator control referredto at No. 25 in FIG. 19 will be described.

FIG. 70 is a functional block diagram indicating a control specificationof the DRL indicator control in the power supply system for automobileaccording to one embodiment of the invention, and FIG. 71 is aprogramming flowchart of a control task to be executed by CPU in thepower supply system for automobile according to the one embodiment ofthe invention. By the way, its control program is written in C language.

Here, using FIG. 71, input/output signals in this control task andcontrol functions will be described in the following.

There are four input signals. Starter SW (iIGNSwST) is a signal to beinput to bit 1-30 of CPU 200 in BCM 100 in FIG. 3. Ignition SW1(iIGNswOn-1) is a signal to be input to bit 1-6 of CPU 200 in BCM 100 inFIG. 3. Ignition SW2 (iIGNswOn-2) is a signal to be input to bit 1-5 ofCPU 200 in BCM 100 in FIG.3. Head light SW (iiLiteOn) is a signal to beinput to bit 1-9 of CPU 200 in BCM 100 in FIG. 3.

An output signal which is a DRL indicator output (oDRLInd) is a signaloutput from bit o-3-3 of CPU 200 in BCM 100 in FIG. 3.

Between the four inputs and one output, there are logicallyinterconnected as indicated in FIG. 70 by AND circuit and1, to ORcircuits or1, or2, and an inverting circuit inv1.

Using FIG. 71 and further in reference to FIG. 70, overall controlcontents thereof will be described in the following.

From lines 7100 to 7105, comment statements are described, wherein afunction name, functions, if there is an argument or not, and if thereis a return value or not are described.

In line 7106, it is defined that the function name “dr1-indicator” takesno return value.

In lines 71-7 to 7109, definition statements are written definingvariables (before, . . . , or2) to be used in this control task.

In lines 7110 and thereafter, execution statements are described,wherein on the right-hand side of each execution program and between“/*” and “*/”, a comment statement is written.

In line 7110, the output signal indicative of the status prior to thecontrol is read.

In lines 7111 to 7114, each logic of inverting circuit inv1, OR circuitsor1, or2, and AND circuit and1 is defined.

In line 7115, an output condition is defined such that when or2 becomes“1”, DRL indicator output (oDRLInd) becomes on.

In lines 7116 to 7118, an output signal after the control is read, thecontrol task of the DRL indicator control is released, and theprocessing thereof ends.

As described above, in the DRL indicator control of the invention, ifstarter SW (iIGNswST) is off, or if ignition SW (iIGNswOn-1 oriIGNswOn-2) is on and head light SW (iiLiteOn) becomes on, DRL indicatoroutput (oDRLInd) is caused to become on thereby illuminating day-timelight indicator 373.

In the next, using FIGS. 72 and 73, the ABS warning control indicated atNo. 26 in FIG. 19 will be described.

FIG. 72 is a functional block diagram indicating a control specificationof the ABS warning control in the power supply system for automobileaccording to one embodiment of the invention, and FIG. 73 is a programflowchart of a control task to be executed by CPU in the power supplysystem for automobile according to the one embodiment of the invention.By the way, its control program is written in C language.

Here, using FIG. 72, input/output signals in this control task andcontrol functions will be described in the following. There are fourinput signals. Starter SW (iIGNswST) is a signal to be input to bit 1-30of CPU 200 in BCM 100 in FIG. 3. Ignition SW1 (iIGNswOn-1) is a signalto be input to bit 106 of CPU 200 in BCM 100 in FIG. 3. Ignition SW2(IIGNswOn-2) is a signal to be input to bit 1-5 of CPU 200 in BCM 100 inFIG. 3. ABS signal (iVcmABS) is a signal to be input to bit 27 ofcommunication IC 210 in VCM 110 in FIG. 7.

An output signal which is ABS indicator output (oABSInd) is a signaloutput from bit o-3-2 of CPU 200 in BCM 100 in FIG. 3.

Between the four inputs and the one output, there are logicallyinterconnected as indicated in FIG. 73 by AND circuit and1, two ORcircuits or1, or2, and an inverting circuit inv1.

Now, based on FIG. 73 and further in reference to FIG. 72, overallcontrol contents thereof will be described in the following.

In lines 7300 to 7305, comment statements are described, wherein afunction name, functions, if there is an argument or not, and if thereis a return value or not are described.

In line 7306, it is defined that the function name “abs-indicator” hasno return value.

In lines 7307-7309, definition statements are given defining variables(before, . . . , or2) to be used in this control task.

From line 3710 and thereafter, execution statements are described,wherein on the right-hand side of each execution program and between“/*” and “*/”, a comment statement is described.

In line 7310, an output signal (oABSInd) in the status prior to thecontrol is read.

In lines 7311 to 7314, each logic of inverting circuit inv1, OR circuitsor1/or2, and AND circuit and1 is defined.

In line 7315, an output condition is defined such that when or2 becomes“1”, ABS warning output (oABSInd) becomes on.

In lines 7316-7318, an output signal after the control is read, thecontrol task of the ABS warning control is released, and the processingthereof ends.

As described above, in the ABS warning control of the invention, ifstarter SW (iIGNswST) is off, or if ignition SW (iIGNswOn-1 oriIGNswOn-2) is on-state and when ABS signal (iVcmABS) becomes on, ABSwaring output (oABSInd) is caused to become on, thereby illuminating ABSindicator 374.

In the next, using FIGS. 74-76, the MIL illumination control indicatedat No. 27 in FIG. 19 will be described in the following.

FIG. 74 is a functional block diagram indicating a control specificationof the MIL illumination control in the power supply system forautomobile according to one embodiment of the invention, and FIGS. 75-75are program flowcharts of a control task to be executed by CPU in thepower supply system for automobile according to the one embodiment ofthe invention.

By the way, its control program is written in C language.

Here, using FIG. 74, input/output signals and control functions in thiscontrol task will be described in the following. There are seven inputsignals. Starter SW (iIGNST) is a signal to be input to bit 1-30 of CPU200 in BCM 100 in FIG. 3. Ignition SW1 (IIGNswOn-1) is a signal to beinput to bit 1-6 of CPU 200 in BCM 100 in FIG. 3. Ignition SW2(iIGNswOn-2) is a signal to be input to bit 1-5 of CPU 200 in BCM 100 inFIG. 3. Short sensor (FIM) (xFimSsNG) is a signal to be input to bit 8of communication IC 220 in FIM 120 in FIG. 9. Short sensor(DDM)(xDdmSsNG) is a signal to be input to bit 10 of communication IC230 in DDM 130 in FIG. 11. Short sensor (PDM)(xPdmSsNG) is a signal tobe input to bit 25 of communication IC 260 in PDM 160 in FIG. 11. Shortsensor (RIM) (xRimSsNG) is a signal to be input to bit 1 ofcommunication IC 240 in RIM 140 in FIG. 13.

As for output signals, there are six. MalFunction indicator (oMalFunInd)is a signal output from bit o-3-4 of CPU 200 in BCM 100 in FIG. 3.Buzzer (P9DRBLTBO) is directly controlled by CPU 200 of BCM 100. Shortindicator (oFIMssInd) is a signal output from bit o-1-2 of CPU 200 inBCM 100 in FIG. 3. Short indicator (oDDMssInd) is a signal output frombit o-1-1 of CPU 200 in BCM 100 in FIG. 3. Short indicator)oPDMssInd) isa signal output from bit o-1-0 of CPU 200 in BCM 100 in FIG. 3. Shortindicator (oRIMssInd) is a signal output from bit o-2-1 of CPU 200 inBCM 100 in FIG. 3.

Between the seven inputs and the six outputs, there are logicallyinterconnected as indicated in FIG. 74 by AND circuit and1, three ORcircuits or1-or3, four timer circuits of timer2-timer5 each of whichincluding a mono-stable multi vibrator and an oscillator, and aninverting circuit inv1.

Now, using FIGS. 75-76, and further in reference to FIG. 74, overallcontrol contents thereof will be described in the following.

In lines 7500-7505, comment statements are given, wherein a functionname, functions, if there is an argument or not, and if there is areturn value or not are described.

In line 7506, it is defined the the function name “mil-indicatioor” hasno return value.

In lines 7507-7513, definition statements are described defining initialvalues (=0) of timer2, . . . , or2, and variables (buff2, . . . , and5)to be used in this control task.

From lines 7514 and thereafter, execution statements are described,wherein on the right-hand side of each execution program and between“/*” and “*/”, a comment statement is written.

In lines 7514-7523, each logic of inverting circuit inv1, AND circuitand1, and three OR circuits or1-or3 is defined.

Further, in each of buff2 to buff5, it is respectively set up shortsensor (FIM) (xFimSsNG), short sensor (DDM) (xDemSsNG), short sensor(PDM) (xPdmSsNG) and short sensor (RIM) (xRimSsNG),

In lines 7524-7538, if buff2 is “1”, namely, if short sensor (FIM)(xFimSsNG) is “1”, timer2 is enabled for ten seconds to repeat on andoff-states at a cycle of 250 ms, and wherein in the on-state (q22=1),the short indicator (oFIMssInd) is caused to be on.

In lines 7539-7553, if buff3 is “1”, namely, when short sensor (DDM)(xDdmSsNG) is “1”, timer is enabled for ten seconds to repeat on andoff-states at a cycle of 250 ms, wherein in the on-state (q33=1), theshort indicator (oDDMssInd) is caused to be on.

In lines 7554-7568, if buff4 is “1”, namely, when short sensor (PDM)(xPdmSsNG) is “1”, timer4 is enabled for ten minutes to repeat on/offstates at a cycle of 250 ms, and wherein in the on-state (q44=1), shortindicator (oPDMssInd) is caused to be on.

In lines 7569-7583, if buff5 is “1”, that is, when short sensor (RIM)(xRimSsNG) is “1”, timer5 is enabled for ten seconds to repeat on andoff-states at a cycle of 250 ms, and wherein in the on-state (q55=1),short indicator (oRImssInd) is caused to be on.

In line 7584, if or3 is “1”, depending whether starter SW (iIGNST) isoff, or ignition SW (iIGNswOn-1; iIGNswOn-2) is on and any of shortsensor (xFimSsNG; xDdmSsNG; xPdmSsNG; xRimSsNG) is on, the MalFunctionindicator (oMalFuncInd) is caused to be on.

In lines 7585-7586, if or2 is “1”, that is, when any of short sensor(xFimSsNG; xDdmSsNG; xPdmSsNG; xRimSsNG) is on, the buzzer task isactivated.

In lines 7592-7599, if q2, q3, q4, q5 become “0”, short indicator(oFIMssInd; oDDMssInd; oPDMssInd; oRIMssInd) is caused to be off, thecontrol task of the MIL illumination control is released, and theprocessing there of ends.

As described above, in the MIL illumination control of the invention,when the short sensor (xFimSsNG; xDdmSsNG; xPdmSsNG; xRimSsNG) becomeson, the short indicator (oFIMssInd; oDDMssInd; oPDMssInd; oRIMssInd) iscaused to become on thereby flickering FIM short-circuit detectionindicator 365, DDM short-circuit detection indicator 366, PDMshort-circuit detection indicator 367 and RIM short-circuit detectionindicator 370. Further, if starter SW (iIGNST) is off or ignition SW(iIGNswOn-1; iIGNswOn-2) is on and any of the short sensor (xFimSSNG;xDdmSsNG; xPdmSsNG; xRimSsNG) is on, MalFunction indicator (oMalFunInd)is caused to be on, thereby illuminating disorder function indicator372. Still further, if any of the short sensor (xFimSsNG; xDdmSsNG;xPdmSsNG; xRimsSNG) is on, the buzzer is sounded.

Now, using FIGS. 77 and 78, the CCM data transfer control indicated atNo. 28 in FIG. 19 will be described in the following.

FIG. 77 is a functional block diagram indicating a control function ofthe CCM data transfer control in the power supply system for automobileaccording to one embodiment of the invention, and FIG. 78 is a programflowchart of a control task to be executed by CPU in the power supplysystem for automobile according to the one embodiment of the invention.By the way, its control program is written in C language.

Now, using FIG. 77, input/output signals and control functions in thiscontrol task will be described in the following. There are seven inputsignals. Stop lamp SW (iStopSw) is a signal to be input to bit 1-12 ofCPU 200 in BCM 100 in FIG. 3. Ignition SW1 (iIGNswOn-1) is a signal tobe input to bit 1-6 of CPU 200 in BCM 100 in FIG. 3. Ignition SW2(IIGNswOn-2) is a signal to be input to bit 1-5 of CPU 200 in BCM 100 inFIG. 3. Cruise on/off SW (iCcmOnOff) is a signal to be input to bit 1-26of CPU 200 in BCM 100 in FIG. 3. Cruise set SW (iCcmS-C) is a signal tobe input to bit 1-25 of CPU 200 in BCM 100 in FIG. 3. Cruise resume SW(iCcm-A) is a signal to be input to bit 1-24 of CPU 200 in BCM 100 inFIG. 3. Brake lamp SW (iBrkSw) is a signal to be input to bit 1-11 ofCPU 200 in BCM 100 in FIG. 3.

As for output signals, there are five. Cruise brake lamp signal(oCcmBrkLmp) is a signal output from bit 27 of communication IC 250 inCCM 150 in FIG. 15. Cruise on/off signal (oCcmCsOF) is a signal outputfrom bit 28 of communication IC 250 in CCM 150 in FIG. 15. Cruise setsignal (oCcmCrsSC) is a signal output from bit 29 of communication IC250 in CCM 150 in FIG. 15. Cruise resume accel signal (oCcmRA) is asignal output from bit 30 of communication IC 250 in CCM 150 in FIG. 15.Cruise brake pedal signal (oCcmBrkPd) is a signal output from bit 26 ofcommunication IC 250 in CCM 150 in FIG. 15.

Between the seven inputs and the five outputs, there are logicallyinterconnected as shown in FIG. 77 by four AND circuits and1-and4, ORcircuit or1, and four inverting circuits inv1-inv4.

In the next, using FIG. 78 and further in reference to FIG. 77, overallcontrol contents thereof will be described.

In lines 7800-7805, comment statements are described, wherein a functionname, functions, if there is an argument or not, and if there is areturn value or not are described.

In line 7806, it is defined that the function name “CCM-data-trans”takes no return value.

In lines 7807-7809, definition statement is written defining variables(before, . . . , or1) to be used in this control task.

In lines 7810 and thereafter, execution statements are described,wherein on the right-hand side of each execution program and between“/*” and “*/”, a comment statement is given.

In line 7810, the output signal indicating the status prior to thecontrol (oCcmBrkLmp) is read.

In lines 7811-7819, each logic of OR circuit or1, four invertingcircuits inv1-inv4, and four AND circuits and1-and4 is defined.

In lines 7820-7824, if stop lamp SW (iStopSw) is “1”, the cruise brakelamp signal (oCcmBrkLmp) becomes on. If and1 is “1”, namely, whenignition SW (iIGNswOn-1; iIGNswOn-2) is on and cruise on/off SW(iCcmOnOff) is off, the cruise on/off signal (oCcmCrsOF) is caused to beon. Further, if and2 is “1”, namely, when ignition SW (iIGNswOn-1;iIGnswOn-2) is on and cruise set SW (iCcmS-C) is off, the cruise setsignal (oCcmCrsSC) is caused to be on. Further, if and3 is “1”, namely,when ignition SW (iIGNswOn-1; iIGNswOn-2) is on and cruise resume SW(iCcm-A) is off, the cruise resume acceleration signal (oCcmRA) is causeto be on. Further, if and4 is “1”, namely, when ignition SW (iIGNswOn-1;iIGNswOn-2) is on and brake lamp SW (iBrkSw) is off, the cruise brakepedal signal (oCcmBrkPd1) is set on.

In lines 7825-7826, an output signal after the control is read, and CCMdata transfer flag is set on.

In lines 7827-7829, the control task of the CCM data transfer control isreleased and the processing thereof is terminated.

As described above, in the CCM data transfer control of the invention,if stop lamp SW (iStopSw) becomes on, cruise brake lamp signal(oCcmBrkLmp) is set on, and is output to cruise controller (CrsCont)1501. Further, if ignition SW (iLGNswOn-1; iIGNswOn-2) is on and cruiseon/off SW (iCcmOnOff) is off, cruise on/off signal (oCcmCrsOF) is seton, and is output to cruise controller (Crs Cont) 1501. Still further,if and2 is “1”, namely, when ignition SW (iIGNswOn-1; iIGNswOn-2) is onand cruise set SW (iCcmS-C) is off, cruise set signal (oCcmCrsSC) is seton, and output to cruise controller (Crs Cont) 1501. Still more, if and3is “1”, namely, when ignition SW (iIGNswOn-1; iIGNswOn-2) is on andcruise resume SW (iCcm-A) is off, cruise resume acceleration signal(oCcmRA) is set on, and output to cruise controller (Crs Cont) 1501. Ifand4 is “1”, namely, when ignition SW (iIGNswOn-1 or iIGNswOn-2) is onand brake lamp SW (iBrkSw) is off, cruise brake pedal signal(oCcmBrkPd1) is set on, and output to cruise controller (Crs Cont) 1501.

In lines 5012-5018, the up and down motion of the mirror is executed inaccordance with the truth value table TVT1 of FIG. 49, wherein if doormirror up sw (iDmUP) is “1”, DR mirror up/down motor output 1(oLHMirUD-1) is set on, and if door mirror down sw (iDmDN) is “1”, DRmirror up/down motor output 2 (oHLMirUD-2) is set on.

Now, with reference to FIGS. 79 and 80, PRNDL decoder control asindicated at No. 29 of FIG. 19 will be described.

FIG. 79 is a functional block diagram indicating a control specificationof the PRNDL decoder control in the power supply system for automobileaccording to one embodiment of the invention, and FIG. 80 is a programflowchart of a control task to be executed by CPU in the power supplysystem for automobile according to the one embodiment of the invention.By the way, its control program is written in C language.

Here, using FIG. 79, input/output signals and control functions in thiscontrol task will be described in the following. There are four inputsignals. P/NP(1) signal (iPN1) is a signal to be input to bit 27 ofcommunication IC 220 in FIM 120 in FIG. 9. P/NP(2) signal (iPN2) is asignal to be input to bit 26 of communication IC 220 in FIM 120 in FIG.9. P/NP(3) signal (iPN3) is a signal to be input to bit 25 ofcommunication IC 220 in FIM 120 in FIG. 9. P/NP(4) signal (iPN4) is asignal to be input to bit 24 of communication IC 220 in FIM 120 in FIG.9.

As for output signals, there are four. PRNDL signal 1 (OPRNDL1) is asignal output from bit o-2-7 of CPU 200 in BCM 100 in FIG. 3. PRNDLsignal 2 (oPRNDL2) is a signal output from bit o-2-6 of CPU 200 in BCM100 in FIG. 3. PRNDL signal 3 (oPRNDL3) is a signal output from bito-2-5 of CPU 200 in BCM 100 in FIG. 3. PRNDL signal 4 (OPRNDL4) is asignal output from bit o-2-4 of CPU 200 in BCM 100 in FIG. 9.

Between the four inputs and the four outputs, there are logically set upas indicated in FIG. 79 according to the true value table TVT 1.

Now, using FIG. 80 and further in reference to FIG. 79, overall controlcontents thereof will be described in the following.

In lines 8000-8005, comment statements are described, wherein a functionname, functions, if there is an argument or not, and if there is areturn value or not are described.

In line 8006, it is defined that the function name “prnd1-decode” takesno return value.

In lines 8007-8009, definition statement is described defining variables(before, . . . , input) to be used in this control task.

In lines 8010 and thereafter, execution statements are described,wherein on the right-hand side of each execution program and between“/*” and “*/”, a comment statement is given.

In line 8010, bit allocations for variable inputs of input signals(P/NP(1) signal (iPN1); P/NP (2) signal (iPN2); P/NP (3) signal (iPN3);P/NP(4) signal (iPN4)) are executed.

In lines 8011-8020, according to the truth value table TVT1 in FIG. 79,output signals (PRNDL signal 1 (oPRNDL1; PRNDL signal 2 (oPRNDL2); PRNDLsignal 3 (oPRNDL3); PRNDL signal 4 (oPRNDL4) are set on and off.

In lines 8021-8022, the control task of the PRNDL decoder control isreleased, and the processing there of ends.

As described above, in the PRNDL decoder control of the invention, inresponse to the input signal (P/NP (1) signal (iPN1); P/NP(2) signal(iPN2); P/NP(3) signal (iPNP-3); P/NP(4) signal (iPNP-4)), the outputsignal (PRNDL signal 1 (oPRNDL1; PRNDL signal 2 (oPRNDL2); PRNDL signal3 (oPRDL3); PRNDL signal 4 (oPRNDL4)) is set on and off, then, output toPRNDL display circuit 368, and with use of 4 bit data having been input,each shift position of P (parking), R (reverse), N (neutral), D (drive)and L (low) is displayed on the PRNDL indicator in indicator 104 shownin FIG. 1.

Now, using FIGS. 81-83, the door power window control indicated at No.30 in FIG. 19 will be described.

FIG. 81 is a functional block diagram indicating a control specificationof the door power window control in the power supply system forautomobile according to one embodiment of the invention, and FIGS. 82-83are program flowcharts of a control task to be executed by CPU in thepower supply system for automobile according to the one embodiment ofthe invention. By the way, its control program is written in C language.

Here, using FIG. 81, input/output signals and control functions in thiscontrol task will be described in the following. There are 18 inputsignals. Ignition SW1 (iIGNswOn-1) is a signal to be input to bit 1-6 ofCPU 200 in BCM 100 in FIG. 3. Ignitions SW2 (iIGNswOn-2) is a signal tobe input to bit 1-5 of CPU 200 in BCM 100 in FIG. 3. P/W lock SW(iPwLKSw) is a signal to be input to bit 27 of communication IC 230 inDDM 123 in FIG. 11. DR seat FRP/W-up SW (iDRPwFRUp) is a signal to beinput to bit 20 of communication IC 230 in DDM 130 in FIG. 11.

AS seat P/W-up SW (iPwFRUp) is a signal to be input to bit 26 ofcommunication IC 260 in PDM 160 in FIG. 17. DR seat FRP/W-down SW(iDRPwFRDn) is a signal to be input to bit 21 of communication IC 230 inDDM 130 in FIG. 11. AS seat P/W-down SW (iPwFRDn) is a signal to beinput to bit 27 of communication IC 260 in PDM 160 in FIG. 17. DR seatRRP/W-up SW (iDRPwRRUp) is a signal to be input to bit 24 ofcommunication IC 230 in DDM 130 in FIG. 11.

RR seat P/W-up SW (iPwRRUp) is a signal to be input to bit 25 ofcommunication IC 240 in RIM 140 in FIG. 13. DR seat RRP/W-down SW(iDRPwRRDn) is a signal to be input to bit 25 of communication IC 230 inDDM 130 in FIG. 11. RR seat P/W-down SW (iPwRRDn) is a signal to beinput to bit 24 of communication IC 240 in RIM 140 in FIG. 13. DR seatRLP/W-up SW (iDRPwRLUp) is a signal to be input to bit 22 ofcommunication IC 230 in DDM 130 in FIG. 11.

RL seat P/W-up SW (iPwRLUp) is a signal to be input to bit 27 ofcommunication IC 240 in RIM 140 in FIG. 13. DR seat RLP/W-down SW(iDRPwRLDn) is a signal to be input to bit 23 of communication IC 230 inDDM 130 in FIG. 11. RL seat P/W-down SW (iPwRLDn) is a signal to beinput to bit 26 of communication IC 240 in RIM 140 in FIG. 13. P/W lockdetection signal SW (iPwMtLk) is a signal to be input to bit 26 ofcommunication IC 230 in DDM 130 in FIG. 11. DR seat FLP/W-up SW(iDRPwFLUp) is a signal to be input to bit 18 of communication IC 230 inDDM 130 in FIG. 11. DR seat FLP/W-down SW (iDRPwFLDn) is a signal to beinput to bit 19 of communication IC 230 in DDM 130 in FIG. 11.

There are eight output signals. AS power window-up (oPwAS-1) is a signaloutput from bit 21 of communication IC 260 in PDM 160 in FIG. 17. ASpower window-down (oPwAS-2) is a signal output from bit 20 ofcommunication IC 260 in PDM 160 in FIG. 17. RR power window-up (oPwRR-1)is a signal output from bit 11 of communication IC 240 in RIM 140 inFIG. 13. RR power window-down (oPwRR-2) is a signal output from bit 10of communication IC 240 in RIM 140 in FIG. 13. RL power window-up(oPwRL-1) is a signal output from bit 9 of communication IC 240 in RIM140 in FIG. 13. RL power window-down (oPwRL-2) is a signal output frombit 8 of communication IC 240 in RIM 140 in FIG. 13. DR power window-up(oPwDR-1) is a signal output from bit 5 of communication IC 230 in FIG.11. DR power window-down (oPwDR-2) is a signal output from bit 4 ofcommunication IC 230 in DDM 130 in FIG. 11.

Between the 18 inputs and the 8 outputs, there are logicallyinterconnected as indicated in FIG. 81 by twelve AND circuits and1,and2, and12-and14, and22-and24, and32-and34, nine OR circuits or1, or2,or1-or13, or22-or23, or32-or33, inverting circuits inv1, inv2, andmono-stable multi-vibrator timer 0.

Nextly, according to FIGS. 82 and 83, and further with reference to FIG.81, overall control contents thereof will be described.

In lines 8200-8205, comment statements are described, wherein a functionname, functions, if there is an argument or not, and if there is areturn value or not are described.

In line 8206, it is defined that the function name “door-power-wind”takes no return value.

In lines 8207-8213, definition statement is described defining aninitial value (=0) of q1, and variables (before1, . . . , and33) to beused in this control task.

In lines 8214 and thereafter, execution statements are described,wherein on the right-hand side of each execution program and between“/*” and “*/”, a comment statement is described.

In lines 8214-8217, four of the eight output signals in the statusbefore the control are read as 2 bit data, respectively.

In lines 8218-8228, logic of the AS power window is defined, andfurther, output conditions for up/down of the AS side windows aredefined. That is, each logic of OR circuit or11-or13, inverting circuitinv11, and AND circuits and11-and14 is defined. Further, outputconditions of output signals are defined such that when the output ofand14 is “1”, UP is set, and when the output of and13 is “1”, DOWN isset.

For example, if ignition SW (iIGNswOn-1 or iIGNswOn-2) is on, P/W lockSW (iPwLKSw) is off, AS side window-up SW (iDRPwFRUp or iPwFRUp) is on,and AND circuit 13 (down signal) is off, the AS side window is set inthe UP mode. Further, if ignition SW (iIGNswOn-1 or iIGNswOn-2) is on,P/W lock SW (iPwLKSw) is off, and AS side window-down SW (iDRPwFRDn oriPwFRDn) is on, the AS side window is set in the down mode.

In lines 8229-8236, logic of the RR power window is defined in the sameway as for the AS side, and also output conditions for the up/down ofthe AS side windows are defined.

Further, in lines 8237-8244, logic of the RR power windows is defined inthe same manner as for the AS side, and further, output conditions forthe up/down of the AS side windows are defined.

Still further, in lines 8245-8249, for enabling the DR power window,each logic of inverting circuit inv3, OR circuit or1, and AND circuitsand1, and2 is defined.

In lines 8250-8257, in order to cause a delay of 500 ms, mono-stablemulti vibrator timer 1 is defined.

In lines 8258-8260, output conditions for the up/down of the DR sidewindows are defined. That is, when the output of AND circuit and1 is“1”, UP mode is set, and when the output of or2 is “1”, DOWN mode isset.

In lines 8261-8272, an output signal after the control is read, comparedwith the output signal before the control, and if they do not agree witheach other, namely, when the signal has changed therebetween, PDM, RIM,DDM data transfer flags are set on.

In lines 8273-8275, if and2 becomes “0”, the control task of the doorpower window control is released, and the processing there of ends.

As described above, in the door power window control of the invention,while ignition SW (iIGNswOn-1 or iIGNswOn-2) is on and P/W lock SW(iPwLKSw) is off, in response to any input of Up/Down, an output ofup/down is produced to a corresponding window so as to activate powerwindow motor 1721, 1332, 1333 or 1122 thereby moving the correspondingwindow up and down.

In the next, using FIGS. 84 and 85, the stop lamp diagnosis controlindicated at No. 31 in FIG. 19 will be described in the following.

FIG. 84 is a functional block diagram indicating a control specificationof the stop lamp diagnosis control in the power supply system forautomobile according to one embodiment of the invention, and FIG. 85 isa program flowchart of a control task to be executed by CPU in the powersupply system for automobile according to the one embodiment of theinvention. By the way, its control program is written in C language.

Here, using FIG. 84, input/output signals and control functions in thiscontrol task will be described. There are four input signals. RL stopdiagnosis signal (iRLTurnDTPdiag) is a signal to be input to bit 23 ofcommunication IC 240 in RIM 140 in FIG. 13. RL/turn stop output(oTurnSTPLHR) is a signal output from bit 23 of communication IC 240 inRIM 140 in FIG. 13. RR stop diagnosis signal (iRRTurnDTPdiag) is asignal to be input to bit 22 of communication IC 240 in RIM 140 in FIG.13. RL/turn stop output (oTurnSTPLHR) is a signal output from bit 23 ofcommunication IC 240 in RIM 140 in FIG. 13.

An output signal which is a stop lamp open (oStopOpen) is a signaloutput from bit o-2-0 of CPU 200 in BCM 100 in FIG. 3.

Between the four inputs and the one output, there are logicallyinterconnected as indicated in FIG. 84 by two exclusive OR circuitseor1, eor2, AND circuit and1, OR circuit or, and timer circuit(oscillator) timer 16.

In the next, based on FIG. 85 and further in reference to FIG. 84,overall control contents thereof will be described in the following.

In lines 8500-8505, comment statements are described, wherein a functionname, functions, if there is an argument or not, and if there is areturn value or not are described.

In line 8506, it is defined that the function name “stop-lamp-diag”takes no return value.

In lines 8507-8509, definition statements are described defining aninitial value (=0) of q, and variables (eor1, . . . , and1) to be usedin this control task.

In lines 8510 and thereafter, execution statements are given, wherein onthe right-hand side of each execution program and between “/*” and “*/”,a comment statement is described.

In lines 8510-8512, each logic of the two exclusive OR circuits eor1,eor2, and the OR circuit or1 is defined. Here, it should be noted thateor1 is set on when RL/turn stop output (oTurnSTPLHR) which is an outputsignal does not agree with RL stop diagnosis signal (iRLTurnDTPdiag)which is produced as a result of control by the output signal thereof.

In lines 8513-8519, the timer is defined to repeat on/off operation at acycle of 1 ms.

In line 8520, an output condition for output signals is defined suchthat when and1 is “1”, the lamp is caused to flash.

In lines 8521-8523, the control task of the stop lamp diagnosis controlis released, and the processing thereof ends.

As described heretofore, in the stop lamp diagnosis control of theinvention, when the RL/turn stop output (oTurnSTPLHR) which is theoutput signal and the RL stop diagnosis signal (iRLTurnDTPdiag) which isproduced as the result of control by this output signal do not agreewith each other, the STOP lamp open (oStopOpen) is caused to be on andoff so as to flash stop lamp load open detection indicator 371.

According to the embodiment of the invention, in the power supply to PCM20 that executes fundamental controls of the engine, power line 22 isindependently provided therefor separate from power line PL provided inloop for the accessory systems. Therefore, even if the control module ofthe accessory systems fails or breaks down, PCM 20 that executes theengine control is ensured to operate normally.

Further, because power line 32 that supplies power to A/C 30 whichconsumes a large current is provided independently from power line PL inloop for the accessory systems, even if A/C 30 fails, the normal driveoperation of the automobile is ensured to be carried out.

Still further, power line 42 for navigation 40 which is an auxiliaryinformation unit to be able to assist driving of the automobile isprovided independently from the loop power line PL for the accessorysystems, even if navigation 40 fails, the normal operation of theautomobile can be ensured to be carried out.

Therefore, according to the embodiments of the invention, adverse effecton the other modules due to the malfunctioning thereof in the powersupply system for vehicles can be minimized.

Further, because electrical loads are supplied with power from the powerline PL provided in the form of loop and via switching devices that arecontrolled by respective control modules, the number of power lines inthe system can be minimized. Still further, because of the provision ofMOSFET with protection function as the switching devices of theinvention, the fusible link that requires concentrical allocation of themodules and has been used conventionally, no more needs to be used.Thereby, a total length of the power lines can be minimized due toelimination of the lengthy layout of the conventional power lines.Therefore, the power supply lines in the power supply system forvehicles can be reduced substantially.

INDUSTRIAL APPLICABILITY

The power supply system, the method thereof, semiconductor circuitdevices and integrated wiring devices therefor according to theinvention have been described by way of example as applied to the powersupply system for automobile, however, it is not limited thereto, andthe fundamental features of the invention can be applied, for example,to electric trains, airplanes, ships and other passenger vehicles havingmany electric loads distributed therein remote from its power sourcewithin the scope of the invention.

What is claimed is:
 1. An electric power supply system for a vehiclecomprising: an electric power supply; a plurality of control modules fora plurality of accessory systems, said plurality of control modulesbeing connected to said power supply via a first power line; and a powercontrol module for controlling a drive source of said vehicle, saidpower control module being connected to said electric power supply via asecond power line different from said first power line; wherein, saidfirst power line is connected electrically to said electric power supplyvia a first fusible link; and said second power line is connectedelectrically to said electric power supply via a second fusible link. 2.An electric power supply system for a vehicle comprising: an electricpower supply; a plurality of control modules for a plurality ofaccessory systems, said plurality of control modules being connected tosaid power supply via a first, power line; and an air-conditioningconnected to said power supply via a second power line which isdifferent from said first power line; wherein said first power line isconnected electrically to said electric power supply via a first fusiblelink; and said second power line is connected electrically to saidelectric power supply via a second fusible link.
 3. An electric powersupply system for a vehicle comprising: an electric power supply; aplurality of control modules for a plurality of accessory systems, saidplurality of control modules being connected to said power supply via afirst power line; and an information device connected to said electricpower supply via a second power line which is different from said firstpower line; wherein said first power line is connected electrically tosaid electric power supply via a first fusible link; and said secondpower line is connected electrically to said electric power supply via asecond fusible link.
 4. An electric power supply system for a vehiclecomprising: a first control module for controlling one of a vehicledrive unit, an air conditioner unit and an information device; anelectric power supply; a plurality of control modules for a plurality ofaccessory systems, said plurality of control modules being connected tosaid electric power supply via a power line; a plurality of input meansfor inputting input signals to said plurality of control modules; aplurality of electrical loads; a switching device having a protectionfunction connected between said power line and each of said plurality ofelectrical loads; and a signal line for transmitting signals betweensaid plurality of control modules for said plurality of accessorysystems; wherein, a data processing means provided at least in one ofsaid plurality of control modules controls said switching devices inresponse to an input signal from said input means such that power fromsaid power supply is supplied to said electrical loads via said powerline; and said power line connecting electrically said electric powersupply to said plurality of control modules for said plurality ofaccessory systems is connected electrically to said electric powersupply via a fusible link which is separate from a power supply line forsaid first control module.
 5. A power supply system for vehicleaccording to claim 4, wherein said plurality of input means includeignition SW and turn SW; said plurality of electrical loads include afront turn signal lamp; and said data processing means, when saidignition SW is on and said turn SW is on, enables said switching deviceconnected between said power line and said front turn signal lamp toturn on and off periodically such that said front turn signal lamp isflashed on and off accordingly.
 6. A power supply system for vehicleaccording to claim 4, wherein said input means include ignition SW andturn SW; said electrical loads include a rear turn/stop lamp; and saidprocessing means, when said ignition SW and said turn SW are on, causesa switching device connected between said power line and said turn/stoplamp to turn on and off periodically such that said turn/stop lamp isflashed on and off accordingly.
 7. A power supply system for vehicleaccording to claim 4, wherein, said data processing means executesflashing of said turn/stop lamp in priority when a brake pedal ispressed down.
 8. A power supply system for vehicle according to claim 4,wherein, said input means includes ignition SW, turn SW and reverse SW;said electrical loads include a back-up lamp; and wherein said dataprocessing means, when said ignition SW, said turn SW and said reverseSW are on, causes a switching device connected between said power lineand said back-up lamp to turn on such that said back-up lamp isilluminated.
 9. A power supply system for vehicle according to claim 4,wherein said input means includes park lamp SW and starter SW; saidelectrical loads include side lamps and tail-end light; and saidprocessing means, when said park lamp SW and starter SW are on, causes aswitching devices connected between said power line and said side lampsor tail-end light to turn on such that said side lamps and said tail-endlight are illuminated.
 10. A power supply system for vehicle accordingto claim 4, wherein said input means includes starter SW, head light-onSW and high beam SW; said electrical loads include a low beam lamp; andsaid data processing means, when said starter SW and head light-on SWare on while said high beam SW is off, causes a switching deviceconnected between said power line and said low beam lamp to turn on suchthat said low beam lamp is illuminated.
 11. A power supply system forvehicle according to claim 4, wherein said input means includes starterSW, head light-on SW and high beam SW; said electrical loads include ahigh beam lamp; and wherein, said data processing means, when saidstarter SW, head light-on SW and said high beam SW are on, causes aswitching device connected between said power line and said high beamlamp to turn on such that said high beam lamp is illuminated.
 12. Apower supply system for vehicle according to claim 4, wherein said inputmeans include accessory SW and rear wiper SW; said electrical loadsinclude a rear wiper motor; and said data processing means, when saidaccessory SW and said rear wiper SW are on, causes a switching deviceconnected between said power line and said rear wiper motor to turn onsuch that said rear wiper motor is actuated.
 13. A power supply systemfor vehicle according to claim 4, wherein said input means includesaccessory SW and rear wiper washer SW; said electrical loads include arear wiper washer; and said processing means, when said accessory SW andsaid rear wiper washer SW are on, causes a switching device connectedbetween said power line and said rear wiper washer to turn on such thatsaid rear wiper washer is operated.
 14. A power supply system forvehicle according to claim 4, wherein said input means include ignitionSW and rear defogger SW; said electrical loads include a rear defoggerheater; and said processing means, when said ignition SW and said reardefogger SW are on, causes a switching device connected between saidpower line and said rear defogger heater to turn on such that a currentflows through said rear defogger heater.
 15. A power supply system forvehicle according to claim 4, wherein said input means include door lockSW and door unlock SW; said electrical loads include a door lock/unlockmotor; and said processing means, when said door lock SW is on, causes aswitching device connected between said power line and said door lockmotor to turn on such that said door lock/unlock motor is activated tolock the doors, and when said door unlock SW is on, causes saidswitching device connected between said power line and said doorlock/unlock motor to turn on such that said door lock/unlock motor isactivated to unlock the doors.
 16. A power supply system for vehicleaccording to claim 4, wherein said input means include ignition SW,starter SW and seat-belt SW; said electrical loads include a seat-beltwarning lamp; and said processing means, when said seat-belt SW is offwhile said ignition SW and said starter SW are on, causes a switchingdevice connected between said power line and said seat-belt warning lampto turn on such that said seat-belt warning lamp is illuminated.
 17. Apower supply system for vehicle according to claim 4, wherein said inputmeans include key insert SW and door close SW; said electrical loadsinclude an alarm buzzer; and said processing means, when said key insertSW is on while said door close SW is off, causes a switching deviceconnected between said power line and said alarm buzzer to turn on suchthat said alarm buzzer is sounded.
 18. A power supply system for vehicleaccording to claim 4, wherein said input means include ACGL signal, doorclose SW and light-on SW; said electrical loads include an alarm buzzer;and said processing means, when said ACGL signal is “L”, said door closeSW is off, and said light-on SW is on, causes a switching deviceconnected between said power line and said alarm buzzer to turn on suchthat said alarm buzzer is sounded.
 19. A power supply system for vehicleaccording to claim 4, wherein said electrical loads include a courtesylamp; and said processing means, at the times of opening the door,operating the door handle, operating the keyless entry, or upondetection of the door lock, causes a switching device connected betweensaid power line and said courtesy lamp to turn on such that saidcourtesy lamp is illuminated.
 20. A power supply system for vehicleaccording to claim 4, wherein said electrical loads include door mirrordrive motors for left and right-side door mirrors; and said processingmeans, in accordance with selection of right and left door mirrors andin response to a signal designating left/right and upper/downdirections, controls a switching device connected between said powerline and said door mirror drive motors such that said door mirror drivemotors are operated as desired.
 21. A power supply system for vehicleaccording to claim 4, Wherein, said input means include P/NP (LR) SW andrelease SW which indicate positions for release that a shift leverallows; said electrical loads include a rear gate release solenoid; andsaid processing means, when said P/NP (LR) SW and release SW are on,turns on a switch device connected between said power line and saidsolenoid such that said solenoid is operated.
 22. A power supply systemfor vehicle according to claim 4, wherein said input means includeignition SW, starter SW, TTC stop SW and P/NP (SI) SW; said electricalloads include a shift interlock solenoid; and said processing means,when said ignition SW is on, or when said TTC stop SW and P/NP (SI) SWare on while said starter SW is off, turns on a switch device connectedbetween said power line and said solenoid such that said solenoid isoperated.
 23. A power supply system for vehicle according to claim 4wherein said input means include door gate SW and all illuminationturn-on SW; said electrical loads include a rear dome lamp; and saidprocessing means, when said door gate SW and said all illuminationturn-on SW are on, causes a switch device connected between said powerline and said rear dome lamp to turn on such that said rear dome lamp isilluminated.
 24. A power supply system for vehicle according to claim 4,wherein, said input means include starter SW, ignition SW and ACGLsignal; said electrical loads include a charge indicator; and saidprocessing means, when said starter SW is on, or when said ignition SWis on while said ACGL signal is off, turns on a switch device connectedbetween said power line and said charge indicator such that said chargeindicator is illuminated.
 25. A power supply system for vehicleaccording to claim 4, wherein said input means include starter SW,ignition SW and brake signal; said electrical loads include a brakewarning indicator; and said processing means, when said starter SW isoff, or when said ignition SW and said brake signal are on, turns on aswitch device connected between said power line and said brake warningindicator such that said brake warning indicator is illuminated.
 26. Apower supply system for vehicle according to claim 4, wherein said inputmeans include starter SW, ignition SW and head light SW; said electricalloads include a day-time light indicator; and said processing means,when said starter SW is off, or when said ignition SW and said headlight SW are on, turns on a switch device connected between said powerline and said day-time light indicator such that said day-time lightindicator is illuminated.
 27. A power supply system for vehicleaccording to claim 4, wherein said input means include starter SW,ignition SW and ABS signal; said electrical loads include an ABSindicator; and said processing means, when said starter SW is off, orwhen said ignition SW and said ABS signal are on, turns on a switchdevice connected between said power line and said ABS indicator suchthat said ABS indicator is illuminated.
 28. A power supply system forvehicle according to claim 4, wherein said input means include a shortsensor; said electrical loads include a short-circuit detectionindicator; and said processing means, when said short sensor is on,executes to turn on a switch device connected between said power lineand said short-circuit detection indicator such that said short-circuitdetection indicator is illuminated.
 29. A power supply system forvehicle according to claim 4, wherein said input means include ignitionSW, P/W lock SW and up/down SW; said electrical loads include a powerwindow motor; and said processing means, when said ignition SW is on andsaid P/W lock SW is off, and in response to a signal of said up/down SW,executes to turn on a switch device connected between said power lineand said power window motor such that said power window motor isoperated.
 30. A power supply system for vehicle according to claim 4,wherein said electrical loads include a stop lamp load open detectionindicator; and said processing means, when an RL/turn stop output whichis an output signal and an RL stop diagnosis signal which is obtained asa result of control by said output signal are not identical, executes tocause said stop lamp load open detection indicator to flash on and off.31. A power supply system for vehicle comprising: a power supply source;a plurality of control modules for a plurality of accessory systems,said plurality of control modules being connected to said power supplysource via a first power line; a switch element having a protectionfunction, which is connected between said first power line and anelectrical load, and controlled by a signal from said control modulesfor supplying power from said power supply source to said electricalload via said first power line; and a power control module forcontrolling a drive source of said vehicle, which is connected to saidpower supply source via a second power line different from said firstpower line; wherein, said first power line is connected electrically tosaid electric power supply via a first fusible link; and said secondpower line is connected electrically to said electric power supply via asecond fusible link.